diff options
| author | Igor Plyatov <plyatov@gmail.com> | 2011-01-14 19:01:13 +0100 |
|---|---|---|
| committer | Nicolas Ferre <nicolas.ferre@atmel.com> | 2011-01-14 19:49:04 +0100 |
| commit | fcdc2ea76d266e06fc95a364d0e547ca44e3890b (patch) | |
| tree | 4ecf279f396dce9ba663455cd9916efd8d98638a /arch/arm/mach-at91/include/mach/gsia18s.h | |
| parent | 0fb55d3bb73c7d20b39658e65debd7331c223035 (diff) | |
AT91: Support for gsia18s board
The GS_IA18_S (GMS) is a carrier board from GeoSIG Ltd used with the
Stamp9G20 SoM from Taskit company.
It operate as an internet accelerometer.
Signed-off-by: Igor Plyatov <plyatov@gmail.com>
[nicolas.ferre@atmel.com: rm Kconfig, whitespace fixes, change machine name]
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'arch/arm/mach-at91/include/mach/gsia18s.h')
| -rw-r--r-- | arch/arm/mach-at91/include/mach/gsia18s.h | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/arch/arm/mach-at91/include/mach/gsia18s.h b/arch/arm/mach-at91/include/mach/gsia18s.h new file mode 100644 index 00000000000..307c194926f --- /dev/null +++ b/arch/arm/mach-at91/include/mach/gsia18s.h @@ -0,0 +1,33 @@ +/* Buttons */ +#define GPIO_TRIG_NET_IN AT91_PIN_PB21 +#define GPIO_CARD_UNMOUNT_0 AT91_PIN_PB13 +#define GPIO_CARD_UNMOUNT_1 AT91_PIN_PB12 +#define GPIO_KEY_POWER AT91_PIN_PA25 + +/* PCF8574 0x20 GPIO - U1 on the GS_IA18-CB_V3 board */ +#define GS_IA18_S_PCF_GPIO_BASE0 NR_BUILTIN_GPIO +#define PCF_GPIO_HDC_POWER (GS_IA18_S_PCF_GPIO_BASE0 + 0) +#define PCF_GPIO_WIFI_SETUP (GS_IA18_S_PCF_GPIO_BASE0 + 1) +#define PCF_GPIO_WIFI_ENABLE (GS_IA18_S_PCF_GPIO_BASE0 + 2) +#define PCF_GPIO_WIFI_RESET (GS_IA18_S_PCF_GPIO_BASE0 + 3) +#define PCF_GPIO_ETH_DETECT 4 /* this is a GPI */ +#define PCF_GPIO_GPS_SETUP (GS_IA18_S_PCF_GPIO_BASE0 + 5) +#define PCF_GPIO_GPS_STANDBY (GS_IA18_S_PCF_GPIO_BASE0 + 6) +#define PCF_GPIO_GPS_POWER (GS_IA18_S_PCF_GPIO_BASE0 + 7) + +/* PCF8574 0x22 GPIO - U1 on the GS_2G_OPT1-A_V0 board (Alarm) */ +#define GS_IA18_S_PCF_GPIO_BASE1 (GS_IA18_S_PCF_GPIO_BASE0 + 8) +#define PCF_GPIO_ALARM1 (GS_IA18_S_PCF_GPIO_BASE1 + 0) +#define PCF_GPIO_ALARM2 (GS_IA18_S_PCF_GPIO_BASE1 + 1) +#define PCF_GPIO_ALARM3 (GS_IA18_S_PCF_GPIO_BASE1 + 2) +#define PCF_GPIO_ALARM4 (GS_IA18_S_PCF_GPIO_BASE1 + 3) +/* bits 4, 5, 6 not used */ +#define PCF_GPIO_ALARM_V_RELAY_ON (GS_IA18_S_PCF_GPIO_BASE1 + 7) + +/* PCF8574 0x24 GPIO U1 on the GS_2G-OPT23-A_V0 board (Modem) */ +#define GS_IA18_S_PCF_GPIO_BASE2 (GS_IA18_S_PCF_GPIO_BASE1 + 8) +#define PCF_GPIO_MODEM_POWER (GS_IA18_S_PCF_GPIO_BASE2 + 0) +#define PCF_GPIO_MODEM_RESET (GS_IA18_S_PCF_GPIO_BASE2 + 3) +/* bits 1, 2, 4, 5 not used */ +#define PCF_GPIO_TRX_RESET (GS_IA18_S_PCF_GPIO_BASE2 + 6) +/* bit 7 not used */ |