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authorStephen Boyd <sboyd@codeaurora.org>2013-11-15 15:26:10 -0800
committerKevin Hilman <khilman@linaro.org>2013-11-21 15:40:59 -0800
commit161f408978ebbb5a83db05878a7e560acb9c7f21 (patch)
tree0437a79186540a4897581a57125dfccd875d90b8 /arch/arm/mach-clps711x
parent9b12f3a86a2cb82ca6f3b0a0207b12c07dc701b7 (diff)
ARM: clps711x: Switch to sched_clock_register()
The 32 bit sched_clock interface now supports 64 bits. Upgrade to the 64 bit function to allow us to remove the 32 bit registration interface. Cc: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Kevin Hilman <khilman@linaro.org>
Diffstat (limited to 'arch/arm/mach-clps711x')
-rw-r--r--arch/arm/mach-clps711x/common.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-clps711x/common.c b/arch/arm/mach-clps711x/common.c
index 134641d688b..a1935911e4f 100644
--- a/arch/arm/mach-clps711x/common.c
+++ b/arch/arm/mach-clps711x/common.c
@@ -259,7 +259,7 @@ asmlinkage void __exception_irq_entry clps711x_handle_irq(struct pt_regs *regs)
} while (1);
}
-static u32 notrace clps711x_sched_clock_read(void)
+static u64 notrace clps711x_sched_clock_read(void)
{
return ~readw_relaxed(CLPS711X_VIRT_BASE + TC1D);
}
@@ -366,7 +366,7 @@ void __init clps711x_timer_init(void)
tmp = clps_readl(SYSCON1) & ~(SYSCON1_TC1S | SYSCON1_TC1M);
clps_writel(tmp, SYSCON1);
- setup_sched_clock(clps711x_sched_clock_read, 16, timl);
+ sched_clock_register(clps711x_sched_clock_read, 16, timl);
clocksource_mmio_init(CLPS711X_VIRT_BASE + TC1D,
"clps711x_clocksource", timl, 300, 16,