diff options
| author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2008-10-01 17:11:06 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-10-01 17:24:04 +0100 |
| commit | 07f841b7c587a3cbf481509be09ba5eda05f8d31 (patch) | |
| tree | 44f7a45c56568f17841c1a37afc49193fecb1714 /arch/arm/mach-clps7500 | |
| parent | b7a69ac303cbfc8d6fa8e91d10e8049244ba6847 (diff) | |
[ARM] mm: enable sparsemem on clps7500 and RiscPC
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-clps7500')
| -rw-r--r-- | arch/arm/mach-clps7500/include/mach/memory.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/mach-clps7500/include/mach/memory.h b/arch/arm/mach-clps7500/include/mach/memory.h index 3326aa99d3e..87b32db470c 100644 --- a/arch/arm/mach-clps7500/include/mach/memory.h +++ b/arch/arm/mach-clps7500/include/mach/memory.h @@ -32,4 +32,12 @@ #define FLUSH_BASE_PHYS 0x00000000 #define FLUSH_BASE 0xdf000000 +/* + * Sparsemem support. Each section is a maximum of 64MB. The sections + * are offset by 128MB and can cover 128MB, so that gives us a maximum + * of 29 physmem bits. + */ +#define MAX_PHYSMEM_BITS 29 +#define SECTION_SIZE_BITS 26 + #endif |