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authorIngo Molnar <mingo@elte.hu>2009-05-11 14:44:27 +0200
committerIngo Molnar <mingo@elte.hu>2009-05-11 14:44:31 +0200
commit41fb454ebe6024f5c1e3b3cbc0abc0da762e7b51 (patch)
tree51c50bcb67a5039448ddfa1869d7948cab1217e9 /arch/arm/mach-davinci/include/mach/serial.h
parent19c1a6f5764d787113fa323ffb18be7991208f82 (diff)
parent091bf7624d1c90cec9e578a18529f615213ff847 (diff)
Merge commit 'v2.6.30-rc5' into core/iommu
Merge reason: core/iommu was on an .30-rc1 base, update it to .30-rc5 to refresh. Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/arm/mach-davinci/include/mach/serial.h')
-rw-r--r--arch/arm/mach-davinci/include/mach/serial.h21
1 files changed, 18 insertions, 3 deletions
diff --git a/arch/arm/mach-davinci/include/mach/serial.h b/arch/arm/mach-davinci/include/mach/serial.h
index fb8cb229bfd..632847d74a1 100644
--- a/arch/arm/mach-davinci/include/mach/serial.h
+++ b/arch/arm/mach-davinci/include/mach/serial.h
@@ -13,8 +13,23 @@
#include <mach/io.h>
-#define DAVINCI_UART0_BASE (IO_PHYS + 0x20000)
-#define DAVINCI_UART1_BASE (IO_PHYS + 0x20400)
-#define DAVINCI_UART2_BASE (IO_PHYS + 0x20800)
+#define DAVINCI_MAX_NR_UARTS 3
+#define DAVINCI_UART0_BASE (IO_PHYS + 0x20000)
+#define DAVINCI_UART1_BASE (IO_PHYS + 0x20400)
+#define DAVINCI_UART2_BASE (IO_PHYS + 0x20800)
+
+#define DM355_UART2_BASE (IO_PHYS + 0x206000)
+
+/* DaVinci UART register offsets */
+#define UART_DAVINCI_PWREMU 0x0c
+#define UART_DM646X_SCR 0x10
+#define UART_DM646X_SCR_TX_WATERMARK 0x08
+
+struct davinci_uart_config {
+ /* Bit field of UARTs present; bit 0 --> UART1 */
+ unsigned int enabled_uarts;
+};
+
+extern void davinci_serial_init(struct davinci_uart_config *);
#endif /* __ASM_ARCH_SERIAL_H */