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authorSekhar Nori <nsekhar@ti.com>2011-07-06 06:01:21 +0000
committerSekhar Nori <nsekhar@ti.com>2011-07-08 10:51:40 +0530
commita51ca38b6330e463cc1a7adf64502ff735452915 (patch)
tree26c708d7e6cdeea454af2d730e4dd57e46e6c774 /arch/arm/mach-davinci/psc.c
parent8d54297b90831b6e87e62ad910f833b8666094c8 (diff)
davinci: pass clock flags to davinci_psc_config()
Enabling or disabling a PSC can take certain modifiers like "disable with reset", "force enable/disable" and "enable/disable with local reset" apart from the regular clock gating functionality. Pass a flags argument to davinci_psc_config() so these variations can be supported there. At this time only "disable with reset" is supported, but other functionality will be added in subsequent patches. Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Diffstat (limited to 'arch/arm/mach-davinci/psc.c')
-rw-r--r--arch/arm/mach-davinci/psc.c12
1 files changed, 11 insertions, 1 deletions
diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c
index a4158040070..823cb1b9e48 100644
--- a/arch/arm/mach-davinci/psc.c
+++ b/arch/arm/mach-davinci/psc.c
@@ -25,6 +25,8 @@
#include <mach/cputype.h>
#include <mach/psc.h>
+#include "clock.h"
+
/* Return nonzero iff the domain's clock is active */
int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id)
{
@@ -48,11 +50,12 @@ int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id)
/* Enable or disable a PSC domain */
void davinci_psc_config(unsigned int domain, unsigned int ctlr,
- unsigned int id, u32 next_state)
+ unsigned int id, bool enable, u32 flags)
{
u32 epcpr, ptcmd, ptstat, pdstat, pdctl1, mdstat, mdctl;
void __iomem *psc_base;
struct davinci_soc_info *soc_info = &davinci_soc_info;
+ u32 next_state = PSC_STATE_ENABLE;
if (!soc_info->psc_bases || (ctlr >= soc_info->psc_bases_num)) {
pr_warning("PSC: Bad psc data: 0x%x[%d]\n",
@@ -62,6 +65,13 @@ void davinci_psc_config(unsigned int domain, unsigned int ctlr,
psc_base = ioremap(soc_info->psc_bases[ctlr], SZ_4K);
+ if (!enable) {
+ if (flags & PSC_SWRSTDISABLE)
+ next_state = PSC_STATE_SWRSTDISABLE;
+ else
+ next_state = PSC_STATE_DISABLE;
+ }
+
mdctl = __raw_readl(psc_base + MDCTL + 4 * id);
mdctl &= ~MDSTAT_STATE_MASK;
mdctl |= next_state;