diff options
| author | Lennert Buytenhek <buytenh@marvell.com> | 2009-11-24 19:33:52 +0200 |
|---|---|---|
| committer | Nicolas Pitre <nico@fluxnic.net> | 2009-11-27 15:43:21 -0500 |
| commit | 573a652fb0da50a1ff3fca2c67afd81138fd06d2 (patch) | |
| tree | e393e667f733db56447c266d45e58accf141894f /arch/arm/mach-dove | |
| parent | edabd38e1a017e922e3e3b485ee3ddb4df433aa4 (diff) | |
ARM: Add Tauros2 L2 cache controller support
Support for the Tauros2 L2 cache controller as used with the PJ1
and PJ4 CPUs.
Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Signed-off-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Diffstat (limited to 'arch/arm/mach-dove')
| -rw-r--r-- | arch/arm/mach-dove/common.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/mach-dove/common.c b/arch/arm/mach-dove/common.c index a20cf099cd9..806972a68c8 100644 --- a/arch/arm/mach-dove/common.c +++ b/arch/arm/mach-dove/common.c @@ -24,6 +24,7 @@ #include <asm/page.h> #include <asm/setup.h> #include <asm/timex.h> +#include <asm/hardware/cache-tauros2.h> #include <asm/mach/map.h> #include <asm/mach/time.h> #include <asm/mach/pci.h> @@ -760,6 +761,9 @@ void __init dove_init(void) printk(KERN_INFO "Dove 88AP510 SoC, "); printk(KERN_INFO "TCLK = %dMHz\n", (tclk + 499999) / 1000000); +#ifdef CONFIG_CACHE_TAUROS2 + tauros2_init(); +#endif dove_setup_cpu_mbus(); dove_ge00_shared_data.t_clk = tclk; |