diff options
| author | Paul Mundt <lethal@linux-sh.org> | 2008-10-20 11:17:52 +0900 |
|---|---|---|
| committer | Paul Mundt <lethal@linux-sh.org> | 2008-10-20 11:17:52 +0900 |
| commit | 4cb40f795af36b3deb743f6ccf6c3fd542c61c8d (patch) | |
| tree | db3d7519932549bf528f5b8e4cb8350356cd544d /arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h | |
| parent | 79ed2a9216dd3cc35c4f2c5dbaddadb195af83ac (diff) | |
| parent | 0cfd81031a26717fe14380d18275f8e217571615 (diff) | |
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux-2.6
Conflicts:
Documentation/kernel-parameters.txt
arch/sh/include/asm/elf.h
Diffstat (limited to 'arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h')
| -rw-r--r-- | arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h index 9f4458c8e07..22d6c9a6e4c 100644 --- a/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h +++ b/arch/arm/mach-ep93xx/include/mach/ep93xx-regs.h @@ -6,6 +6,40 @@ #define __ASM_ARCH_EP93XX_REGS_H /* + * EP93xx Physical Memory Map: + * + * The ASDO pin is sampled at system reset to select a synchronous or + * asynchronous boot configuration. When ASDO is "1" (i.e. pulled-up) + * the synchronous boot mode is selected. When ASDO is "0" (i.e + * pulled-down) the asynchronous boot mode is selected. + * + * In synchronous boot mode nSDCE3 is decoded starting at physical address + * 0x00000000 and nCS0 is decoded starting at 0xf0000000. For asynchronous + * boot mode they are swapped with nCS0 decoded at 0x00000000 ann nSDCE3 + * decoded at 0xf0000000. + * + * There is known errata for the EP93xx dealing with External Memory + * Configurations. Please refer to "AN273: EP93xx Silicon Rev E Design + * Guidelines" for more information. This document can be found at: + * + * http://www.cirrus.com/en/pubs/appNote/AN273REV4.pdf + */ + +#define EP93XX_CS0_PHYS_BASE_ASYNC 0x00000000 /* ASDO Pin = 0 */ +#define EP93XX_SDCE3_PHYS_BASE_SYNC 0x00000000 /* ASDO Pin = 1 */ +#define EP93XX_CS1_PHYS_BASE 0x10000000 +#define EP93XX_CS2_PHYS_BASE 0x20000000 +#define EP93XX_CS3_PHYS_BASE 0x30000000 +#define EP93XX_PCMCIA_PHYS_BASE 0x40000000 +#define EP93XX_CS6_PHYS_BASE 0x60000000 +#define EP93XX_CS7_PHYS_BASE 0x70000000 +#define EP93XX_SDCE0_PHYS_BASE 0xc0000000 +#define EP93XX_SDCE1_PHYS_BASE 0xd0000000 +#define EP93XX_SDCE2_PHYS_BASE 0xe0000000 +#define EP93XX_SDCE3_PHYS_BASE_ASYNC 0xf0000000 /* ASDO Pin = 0 */ +#define EP93XX_CS0_PHYS_BASE_SYNC 0xf0000000 /* ASDO Pin = 1 */ + +/* * EP93xx linux memory map: * * virt phys size |