diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2012-01-09 14:28:38 -0800 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2012-01-09 14:28:38 -0800 |
commit | dfc1ebe76663d582a01c9dc572395cf8086d01de (patch) | |
tree | 54a5ac91214a90f82c27b6e38099a4470837729e /arch/arm/mach-exynos/common.c | |
parent | acc952c1f373bf3f66cc7a10680eee1762bed40b (diff) | |
parent | b001befe58691ef3627458cd814e8cee7f845c5f (diff) |
Merge tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Device tree conversions for samsung and tegra
Both platforms had some initial device tree support, but this adds
much more to actually make it usable.
* tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (45 commits)
ARM: dts: Add intial dts file for EXYNOS4210 SoC, SMDKV310 and ORIGEN
ARM: EXYNOS: Add Exynos4 device tree enabled board file
rtc: rtc-s3c: Add device tree support
input: samsung-keypad: Add device tree support
ARM: S5PV210: Modify platform data for pl330 driver
ARM: S5PC100: Modify platform data for pl330 driver
ARM: S5P64x0: Modify platform data for pl330 driver
ARM: EXYNOS: Add a alias for pdma clocks
ARM: EXYNOS: Limit usage of pl330 device instance to non-dt build
ARM: SAMSUNG: Add device tree support for pl330 dma engine wrappers
DMA: PL330: Add device tree support
ARM: EXYNOS: Modify platform data for pl330 driver
DMA: PL330: Infer transfer direction from transfer request instead of platform data
DMA: PL330: move filter function into driver
serial: samsung: Fix build for non-Exynos4210 devices
serial: samsung: add device tree support
serial: samsung: merge probe() function from all SoC specific extensions
serial: samsung: merge all SoC specific port reset functions
ARM: SAMSUNG: register uart clocks to clock lookup list
serial: samsung: remove all uses of get_clksrc and set_clksrc
...
Fix up fairly trivial conflicts in arch/arm/mach-s3c2440/clock.c and
drivers/tty/serial/Kconfig both due to just adding code close to
changes.
Diffstat (limited to 'arch/arm/mach-exynos/common.c')
-rw-r--r-- | arch/arm/mach-exynos/common.c | 37 |
1 files changed, 18 insertions, 19 deletions
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c index 647c8434610..c59e1887100 100644 --- a/arch/arm/mach-exynos/common.c +++ b/arch/arm/mach-exynos/common.c @@ -17,6 +17,8 @@ #include <linux/gpio.h> #include <linux/sched.h> #include <linux/serial_core.h> +#include <linux/of.h> +#include <linux/of_irq.h> #include <asm/proc-fns.h> #include <asm/exception.h> @@ -385,6 +387,13 @@ static void __init combiner_init(unsigned int combiner_nr, void __iomem *base, } } +#ifdef CONFIG_OF +static const struct of_device_id exynos4_dt_irq_match[] = { + { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, }, + {}, +}; +#endif + void __init exynos4_init_irq(void) { int irq; @@ -392,7 +401,12 @@ void __init exynos4_init_irq(void) gic_bank_offset = soc_is_exynos4412() ? 0x4000 : 0x8000; - gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset); + if (!of_have_populated_dt()) + gic_init_bases(0, IRQ_PPI(0), S5P_VA_GIC_DIST, S5P_VA_GIC_CPU, gic_bank_offset); +#ifdef CONFIG_OF + else + of_irq_init(exynos4_dt_irq_match); +#endif for (irq = 0; irq < MAX_COMBINER_NR; irq++) { @@ -460,15 +474,6 @@ int __init exynos_init(void) return device_register(&exynos4_dev); } -static struct s3c24xx_uart_clksrc exynos4_serial_clocks[] = { - [0] = { - .name = "uclk1", - .divisor = 1, - .min_baud = 0, - .max_baud = 0, - }, -}; - /* uart registration process */ void __init exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no) @@ -476,16 +481,10 @@ void __init exynos4_init_uarts(struct s3c2410_uartcfg *cfg, int no) struct s3c2410_uartcfg *tcfg = cfg; u32 ucnt; - for (ucnt = 0; ucnt < no; ucnt++, tcfg++) { - if (!tcfg->clocks) { - tcfg->has_fracval = 1; - tcfg->clocks = exynos4_serial_clocks; - tcfg->clocks_size = ARRAY_SIZE(exynos4_serial_clocks); - } - tcfg->flags |= NO_NEED_CHECK_CLKSRC; - } + for (ucnt = 0; ucnt < no; ucnt++, tcfg++) + tcfg->has_fracval = 1; - s3c24xx_init_uartdevs("s5pv210-uart", s5p_uart_resources, cfg, no); + s3c24xx_init_uartdevs("exynos4210-uart", s5p_uart_resources, cfg, no); } static DEFINE_SPINLOCK(eint_lock); |