diff options
| author | Arnd Bergmann <arnd@arndb.de> | 2013-03-05 11:28:29 +0100 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2013-04-19 13:51:20 +0200 |
| commit | 7ba8022fc3a1d2434c1f038f022c5d69026319ca (patch) | |
| tree | fff3699a7037bb225381ca61fef0d11b20e80677 /arch/arm/mach-exynos/include | |
| parent | b4cf27f7735f9e5d80f3e79fcf355ced15461219 (diff) | |
ARM: exynos: prepare for sparse IRQ
When we enable CONFIG_SPARSE_IRQ, we have to set the value of NR_IRQS in
the machine_desc for legacy IRQ domains, and any file referring to the
number of interrupts or a specific number must include the mach/irqs.h
header file explicitly.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-exynos/include')
| -rw-r--r-- | arch/arm/mach-exynos/include/mach/irqs.h | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/arm/mach-exynos/include/mach/irqs.h b/arch/arm/mach-exynos/include/mach/irqs.h index 1f4dc35cd4b..8bd5dde5fc7 100644 --- a/arch/arm/mach-exynos/include/mach/irqs.h +++ b/arch/arm/mach-exynos/include/mach/irqs.h @@ -466,7 +466,10 @@ #define IRQ_TIMER_BASE (IRQ_GPIO_END + 64) /* Set the default NR_IRQS */ +#define EXYNOS_NR_IRQS (IRQ_TIMER_BASE + IRQ_TIMER_COUNT) -#define NR_IRQS (IRQ_TIMER_BASE + IRQ_TIMER_COUNT) +#ifndef CONFIG_SPARSE_IRQ +#define NR_IRQS EXYNOS_NR_IRQS +#endif #endif /* __ASM_ARCH_IRQS_H */ |