diff options
| author | Kukjin Kim <kgene.kim@samsung.com> | 2013-12-19 04:21:34 +0900 |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2013-12-19 05:21:18 +0900 |
| commit | df3e9c057e502c0d46ba37cbb67d52904e97b4c4 (patch) | |
| tree | b2107be3b5ded418a812b5690ad810106a9d40b9 /arch/arm/mach-exynos/include | |
| parent | 9c9239afe31f67d137ba6c45b244b509c2090567 (diff) | |
cpufreq: exynos: move definitions for exynos-cpufreq into drivers/cpufreq/
This moves regarding exynos-cpufreq definitions into drivers/cpufreq/
exynos-cpufreq.h because they are used only for the cpufreq driver.
Cc: Rafael J. Wysocki <rjw@rjwysocki.net>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos/include')
| -rw-r--r-- | arch/arm/mach-exynos/include/mach/regs-clock.h | 21 |
1 files changed, 0 insertions, 21 deletions
diff --git a/arch/arm/mach-exynos/include/mach/regs-clock.h b/arch/arm/mach-exynos/include/mach/regs-clock.h index 5acc06e4bca..22afe63e8c3 100644 --- a/arch/arm/mach-exynos/include/mach/regs-clock.h +++ b/arch/arm/mach-exynos/include/mach/regs-clock.h @@ -18,27 +18,6 @@ #define EXYNOS_CLKREG(x) (S5P_VA_CMU + (x)) -#define EXYNOS4_CLKSRC_CPU EXYNOS_CLKREG(0x14200) -#define EXYNOS4_CLKMUX_STATCPU EXYNOS_CLKREG(0x14400) - -#define EXYNOS4_CLKDIV_CPU EXYNOS_CLKREG(0x14500) -#define EXYNOS4_CLKDIV_CPU1 EXYNOS_CLKREG(0x14504) -#define EXYNOS4_CLKDIV_STATCPU EXYNOS_CLKREG(0x14600) -#define EXYNOS4_CLKDIV_STATCPU1 EXYNOS_CLKREG(0x14604) - -#define EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT (16) -#define EXYNOS4_CLKMUX_STATCPU_MUXCORE_MASK (0x7 << EXYNOS4_CLKSRC_CPU_MUXCORE_SHIFT) - -/* For EXYNOS5250 */ - -#define EXYNOS5_APLL_LOCK EXYNOS_CLKREG(0x00000) -#define EXYNOS5_APLL_CON0 EXYNOS_CLKREG(0x00100) -#define EXYNOS5_CLKMUX_STATCPU EXYNOS_CLKREG(0x00400) -#define EXYNOS5_CLKDIV_CPU0 EXYNOS_CLKREG(0x00500) -#define EXYNOS5_CLKDIV_CPU1 EXYNOS_CLKREG(0x00504) -#define EXYNOS5_CLKDIV_STATCPU0 EXYNOS_CLKREG(0x00600) -#define EXYNOS5_CLKDIV_STATCPU1 EXYNOS_CLKREG(0x00604) - #define EXYNOS5_PWR_CTRL1 EXYNOS_CLKREG(0x01020) #define EXYNOS5_PWR_CTRL2 EXYNOS_CLKREG(0x01024) |