diff options
| author | Jonghwan Choi <jhbird.choi@samsung.com> | 2011-08-24 21:52:45 +0900 |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2011-09-16 16:39:05 +0900 |
| commit | acd35616c7a30130d3b43ae1c1bb0b7fd121ffb9 (patch) | |
| tree | 3ddf2cdd1d64395a8496c6ea9c7dc67a9b701281 /arch/arm/mach-exynos4/clock-exynos4210.c | |
| parent | 2bc02c0daae146283ce1b20da6864a27c848812e (diff) | |
ARM: EXYNOS4: Add support PM for EXYNOS4212
This patch moves regarding clock stuff of PM into clock
file to support PM on EXYNOS4210 and EXYNOS4212 with one
single kernel image. Because some clock registers are
different on each SoCs.
Signed-off-by: Jonghwan Choi <jhbird.choi@samsung.com>
[kgene.kim@samsung.com: use CONFIG_PM_SLEEP instead of CONFIG_PM]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos4/clock-exynos4210.c')
| -rw-r--r-- | arch/arm/mach-exynos4/clock-exynos4210.c | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/arch/arm/mach-exynos4/clock-exynos4210.c b/arch/arm/mach-exynos4/clock-exynos4210.c index fe74b9179fe..b9d5ef670eb 100644 --- a/arch/arm/mach-exynos4/clock-exynos4210.c +++ b/arch/arm/mach-exynos4/clock-exynos4210.c @@ -15,6 +15,7 @@ #include <linux/err.h> #include <linux/clk.h> #include <linux/io.h> +#include <linux/syscore_ops.h> #include <plat/cpu-freq.h> #include <plat/clock.h> @@ -23,12 +24,24 @@ #include <plat/s5p-clock.h> #include <plat/clock-clksrc.h> #include <plat/exynos4.h> +#include <plat/pm.h> #include <mach/hardware.h> #include <mach/map.h> #include <mach/regs-clock.h> #include <mach/exynos4-clock.h> +static struct sleep_save exynos4210_clock_save[] = { + SAVE_ITEM(S5P_CLKSRC_IMAGE), + SAVE_ITEM(S5P_CLKSRC_LCD1), + SAVE_ITEM(S5P_CLKDIV_IMAGE), + SAVE_ITEM(S5P_CLKDIV_LCD1), + SAVE_ITEM(S5P_CLKSRC_MASK_LCD1), + SAVE_ITEM(S5P_CLKGATE_IP_IMAGE_4210), + SAVE_ITEM(S5P_CLKGATE_IP_LCD1), + SAVE_ITEM(S5P_CLKGATE_IP_PERIR_4210), +}; + static struct clksrc_clk *sysclks[] = { /* nothing here yet */ }; @@ -83,6 +96,29 @@ static struct clk init_clocks_off[] = { }, }; +#ifdef CONFIG_PM_SLEEP +static int exynos4210_clock_suspend(void) +{ + s3c_pm_do_save(exynos4210_clock_save, ARRAY_SIZE(exynos4210_clock_save)); + + return 0; +} + +static void exynos4210_clock_resume(void) +{ + s3c_pm_do_restore_core(exynos4210_clock_save, ARRAY_SIZE(exynos4210_clock_save)); +} + +#else +#define exynos4210_clock_suspend NULL +#define exynos4210_clock_resume NULL +#endif + +struct syscore_ops exynos4210_clock_syscore_ops = { + .suspend = exynos4210_clock_suspend, + .resume = exynos4210_clock_resume, +}; + void __init exynos4210_register_clocks(void) { int ptr; @@ -98,4 +134,6 @@ void __init exynos4210_register_clocks(void) s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); + + register_syscore_ops(&exynos4210_clock_syscore_ops); } |