diff options
| author | Marek Szyprowski <m.szyprowski@samsung.com> | 2011-03-15 21:17:43 +0900 |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2011-03-15 21:17:43 +0900 |
| commit | 47a9c0ee79489a3bd4ed52f424b5e5c507768ce3 (patch) | |
| tree | 33a7986128b3bc6909dcef095522f6dec04b7410 /arch/arm/mach-exynos4/gpiolib.c | |
| parent | 6d0de1577eda1fad4be14f70021135ff7df95dcf (diff) | |
ARM: EXYNOS4: Add missing GPYx banks
This patch adds missing GPYx gpio banks on Samsung EXYNOS4 platform.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos4/gpiolib.c')
| -rw-r--r-- | arch/arm/mach-exynos4/gpiolib.c | 49 |
1 files changed, 49 insertions, 0 deletions
diff --git a/arch/arm/mach-exynos4/gpiolib.c b/arch/arm/mach-exynos4/gpiolib.c index c46fdc57d94..1b4121c2e53 100644 --- a/arch/arm/mach-exynos4/gpiolib.c +++ b/arch/arm/mach-exynos4/gpiolib.c @@ -199,6 +199,55 @@ static struct s3c_gpio_chip exynos4_gpio_part2_4bit[] = { .label = "GPL2", }, }, { + .config = &gpio_cfg_noint, + .chip = { + .base = EXYNOS4_GPY0(0), + .ngpio = EXYNOS4_GPIO_Y0_NR, + .label = "GPY0", + }, + }, { + .config = &gpio_cfg_noint, + .chip = { + .base = EXYNOS4_GPY1(0), + .ngpio = EXYNOS4_GPIO_Y1_NR, + .label = "GPY1", + }, + }, { + .config = &gpio_cfg_noint, + .chip = { + .base = EXYNOS4_GPY2(0), + .ngpio = EXYNOS4_GPIO_Y2_NR, + .label = "GPY2", + }, + }, { + .config = &gpio_cfg_noint, + .chip = { + .base = EXYNOS4_GPY3(0), + .ngpio = EXYNOS4_GPIO_Y3_NR, + .label = "GPY3", + }, + }, { + .config = &gpio_cfg_noint, + .chip = { + .base = EXYNOS4_GPY4(0), + .ngpio = EXYNOS4_GPIO_Y4_NR, + .label = "GPY4", + }, + }, { + .config = &gpio_cfg_noint, + .chip = { + .base = EXYNOS4_GPY5(0), + .ngpio = EXYNOS4_GPIO_Y5_NR, + .label = "GPY5", + }, + }, { + .config = &gpio_cfg_noint, + .chip = { + .base = EXYNOS4_GPY6(0), + .ngpio = EXYNOS4_GPIO_Y6_NR, + .label = "GPY6", + }, + }, { .base = (S5P_VA_GPIO2 + 0xC00), .config = &gpio_cfg_noint, .irq_base = IRQ_EINT(0), |