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authorJonghwan Choi <jhbird.choi@samsung.com>2011-08-24 21:52:45 +0900
committerKukjin Kim <kgene.kim@samsung.com>2011-09-16 16:39:05 +0900
commitacd35616c7a30130d3b43ae1c1bb0b7fd121ffb9 (patch)
tree3ddf2cdd1d64395a8496c6ea9c7dc67a9b701281 /arch/arm/mach-exynos4/include
parent2bc02c0daae146283ce1b20da6864a27c848812e (diff)
ARM: EXYNOS4: Add support PM for EXYNOS4212
This patch moves regarding clock stuff of PM into clock file to support PM on EXYNOS4210 and EXYNOS4212 with one single kernel image. Because some clock registers are different on each SoCs. Signed-off-by: Jonghwan Choi <jhbird.choi@samsung.com> [kgene.kim@samsung.com: use CONFIG_PM_SLEEP instead of CONFIG_PM] Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos4/include')
-rw-r--r--arch/arm/mach-exynos4/include/mach/regs-clock.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/mach-exynos4/include/mach/regs-clock.h b/arch/arm/mach-exynos4/include/mach/regs-clock.h
index e75d0f83864..6c37ebe9482 100644
--- a/arch/arm/mach-exynos4/include/mach/regs-clock.h
+++ b/arch/arm/mach-exynos4/include/mach/regs-clock.h
@@ -86,6 +86,8 @@
#define S5P_CLKGATE_IP_IMAGE (soc_is_exynos4210() ? \
S5P_CLKREG(0x0C930) : \
S5P_CLKREG(0x04930))
+#define S5P_CLKGATE_IP_IMAGE_4210 S5P_CLKREG(0x0C930)
+#define S5P_CLKGATE_IP_IMAGE_4212 S5P_CLKREG(0x04930)
#define S5P_CLKGATE_IP_LCD0 S5P_CLKREG(0x0C934)
#define S5P_CLKGATE_IP_FSYS S5P_CLKREG(0x0C940)
#define S5P_CLKGATE_IP_GPS S5P_CLKREG(0x0C94C)
@@ -93,6 +95,8 @@
#define S5P_CLKGATE_IP_PERIR (soc_is_exynos4210() ? \
S5P_CLKREG(0x0C960) : \
S5P_CLKREG(0x08960))
+#define S5P_CLKGATE_IP_PERIR_4210 S5P_CLKREG(0x0C960)
+#define S5P_CLKGATE_IP_PERIR_4212 S5P_CLKREG(0x08960)
#define S5P_CLKGATE_BLOCK S5P_CLKREG(0x0C970)
#define S5P_CLKSRC_MASK_DMC S5P_CLKREG(0x10300)