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authorThomas Abraham <thomas.ab@samsung.com>2013-01-24 10:09:13 -0800
committerKukjin Kim <kgene.kim@samsung.com>2013-01-28 14:27:50 -0800
commit60db7e5f9c9a25a7a9b01007e6e3f5a93bc16a3a (patch)
tree6464e260560d43c20a2dd01321215da97846bf38 /arch/arm/mach-exynos
parente877a5aa178d2288212a6bd254324b8756c098c1 (diff)
ARM: EXYNOS: Fix crash on soft reset on EXYNOS5440
The soft-reset control register is located in the XMU controller space. Map this controller space before writing to the soft-reset controller register. Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Signed-off-by: Girish K S <ks.giri@samsung.com> Signed-off-by: Kukjin <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos')
-rw-r--r--arch/arm/mach-exynos/common.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/arch/arm/mach-exynos/common.c b/arch/arm/mach-exynos/common.c
index e07da6e186a..0c7e3ad7ba9 100644
--- a/arch/arm/mach-exynos/common.c
+++ b/arch/arm/mach-exynos/common.c
@@ -299,6 +299,7 @@ void exynos4_restart(char mode, const char *cmd)
void exynos5_restart(char mode, const char *cmd)
{
+ struct device_node *np;
u32 val;
void __iomem *addr;
@@ -306,8 +307,9 @@ void exynos5_restart(char mode, const char *cmd)
val = 0x1;
addr = EXYNOS_SWRESET;
} else if (of_machine_is_compatible("samsung,exynos5440")) {
- val = (0x10 << 20) | (0x1 << 16);
- addr = EXYNOS5440_SWRESET;
+ np = of_find_compatible_node(NULL, NULL, "samsung,exynos5440-clock");
+ addr = of_iomap(np, 0) + 0xcc;
+ val = (0xfff << 20) | (0x1 << 16);
} else {
pr_err("%s: cannot support non-DT\n", __func__);
return;