diff options
| author | Greg KH <greg@press.(none)> | 2005-10-28 10:13:16 -0700 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@suse.de> | 2005-10-28 10:13:16 -0700 |
| commit | 6fbfddcb52d8d9fa2cd209f5ac2a1c87497d55b5 (patch) | |
| tree | c0414e89678fcef7ce3493e048d855bde781ae8d /arch/arm/mach-footbridge/common.c | |
| parent | 1a222bca26ca691e83be1b08f5e96ae96d0d8cae (diff) | |
| parent | 27d1097d39509494706eaa2620ef3b1e780a3224 (diff) | |
Merge ../bleed-2.6
Diffstat (limited to 'arch/arm/mach-footbridge/common.c')
| -rw-r--r-- | arch/arm/mach-footbridge/common.c | 57 |
1 files changed, 48 insertions, 9 deletions
diff --git a/arch/arm/mach-footbridge/common.c b/arch/arm/mach-footbridge/common.c index eb8238c1ef0..dc09fd200c1 100644 --- a/arch/arm/mach-footbridge/common.c +++ b/arch/arm/mach-footbridge/common.c @@ -130,8 +130,17 @@ void __init footbridge_init_irq(void) * it means that we have extra bullet protection on our feet. */ static struct map_desc fb_common_io_desc[] __initdata = { - { ARMCSR_BASE, DC21285_ARMCSR_BASE, ARMCSR_SIZE, MT_DEVICE }, - { XBUS_BASE, 0x40000000, XBUS_SIZE, MT_DEVICE } + { + .virtual = ARMCSR_BASE, + .pfn = DC21285_ARMCSR_BASE, + .length = ARMCSR_SIZE, + .type = MT_DEVICE + }, { + .virtual = XBUS_BASE, + .pfn = __phys_to_pfn(0x40000000), + .length = XBUS_SIZE, + .type = MT_DEVICE + } }; /* @@ -140,11 +149,32 @@ static struct map_desc fb_common_io_desc[] __initdata = { */ static struct map_desc ebsa285_host_io_desc[] __initdata = { #if defined(CONFIG_ARCH_FOOTBRIDGE) && defined(CONFIG_FOOTBRIDGE_HOST) - { PCIMEM_BASE, DC21285_PCI_MEM, PCIMEM_SIZE, MT_DEVICE }, - { PCICFG0_BASE, DC21285_PCI_TYPE_0_CONFIG, PCICFG0_SIZE, MT_DEVICE }, - { PCICFG1_BASE, DC21285_PCI_TYPE_1_CONFIG, PCICFG1_SIZE, MT_DEVICE }, - { PCIIACK_BASE, DC21285_PCI_IACK, PCIIACK_SIZE, MT_DEVICE }, - { PCIO_BASE, DC21285_PCI_IO, PCIO_SIZE, MT_DEVICE } + { + .virtual = PCIMEM_BASE, + .pfn = __phys_to_pfn(DC21285_PCI_MEM), + .length = PCIMEM_SIZE, + .type = MT_DEVICE + }, { + .virtual = PCICFG0_BASE, + .pfn = __phys_to_pfn(DC21285_PCI_TYPE_0_CONFIG), + .length = PCICFG0_SIZE, + .type = MT_DEVICE + }, { + .virtual = PCICFG1_BASE, + .pfn = __phys_to_pfn(DC21285_PCI_TYPE_1_CONFIG), + .length = PCICFG1_SIZE, + .type = MT_DEVICE + }, { + .virtual = PCIIACK_BASE, + .pfn = __phys_to_pfn(DC21285_PCI_IACK), + .length = PCIIACK_SIZE, + .type = MT_DEVICE + }, { + .virtual = PCIO_BASE, + .pfn = __phys_to_pfn(DC21285_PCI_IO), + .length = PCIO_SIZE, + .type = MT_DEVICE + } #endif }; @@ -153,8 +183,17 @@ static struct map_desc ebsa285_host_io_desc[] __initdata = { */ static struct map_desc co285_io_desc[] __initdata = { #ifdef CONFIG_ARCH_CO285 - { PCIO_BASE, DC21285_PCI_IO, PCIO_SIZE, MT_DEVICE }, - { PCIMEM_BASE, DC21285_PCI_MEM, PCIMEM_SIZE, MT_DEVICE } + { + .virtual = PCIO_BASE, + .pfn = __phys_to_pfn(DC21285_PCI_IO), + .length = PCIO_SIZE, + .type = MT_DEVICE + }, { + .virtual = PCIMEM_BASE, + .pfn = __phys_to_pfn(DC21285_PCI_MEM), + .length = PCIMEM_SIZE, + .type = MT_DEVICE + } #endif }; |