diff options
author | Len Brown <len.brown@intel.com> | 2009-04-05 02:14:15 -0400 |
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committer | Len Brown <len.brown@intel.com> | 2009-04-05 02:14:15 -0400 |
commit | 478c6a43fcbc6c11609f8cee7c7b57223907754f (patch) | |
tree | a7f7952099da60d33032aed6de9c0c56c9f8779e /arch/arm/mach-gemini/include/mach/irqs.h | |
parent | 8a3f257c704e02aee9869decd069a806b45be3f1 (diff) | |
parent | 6bb597507f9839b13498781e481f5458aea33620 (diff) |
Merge branch 'linus' into release
Conflicts:
arch/x86/kernel/cpu/cpufreq/longhaul.c
Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'arch/arm/mach-gemini/include/mach/irqs.h')
-rw-r--r-- | arch/arm/mach-gemini/include/mach/irqs.h | 53 |
1 files changed, 53 insertions, 0 deletions
diff --git a/arch/arm/mach-gemini/include/mach/irqs.h b/arch/arm/mach-gemini/include/mach/irqs.h new file mode 100644 index 00000000000..06bc47e77e8 --- /dev/null +++ b/arch/arm/mach-gemini/include/mach/irqs.h @@ -0,0 +1,53 @@ +/* + * Copyright (C) 2001-2006 Storlink, Corp. + * Copyright (C) 2008-2009 Paulius Zaleckas <paulius.zaleckas@teltonika.lt> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#ifndef __MACH_IRQS_H__ +#define __MACH_IRQS_H__ + +#define IRQ_SERIRQ1 31 +#define IRQ_SERIRQ0 30 +#define IRQ_PCID 29 +#define IRQ_PCIC 28 +#define IRQ_PCIB 27 +#define IRQ_PWR 26 +#define IRQ_CIR 25 +#define IRQ_GPIO(x) (22 + (x)) +#define IRQ_SSP 21 +#define IRQ_LPC 20 +#define IRQ_LCD 19 +#define IRQ_UART 18 +#define IRQ_RTC 17 +#define IRQ_TIMER3 16 +#define IRQ_TIMER2 15 +#define IRQ_TIMER1 14 +#define IRQ_FLASH 12 +#define IRQ_USB1 11 +#define IRQ_USB0 10 +#define IRQ_DMA 9 +#define IRQ_PCI 8 +#define IRQ_IPSEC 7 +#define IRQ_RAID 6 +#define IRQ_IDE1 5 +#define IRQ_IDE0 4 +#define IRQ_WATCHDOG 3 +#define IRQ_GMAC1 2 +#define IRQ_GMAC0 1 +#define IRQ_IPI 0 + +#define NORMAL_IRQ_NUM 32 + +#define GPIO_IRQ_BASE NORMAL_IRQ_NUM +#define GPIO_IRQ_NUM (3 * 32) + +#define ARCH_TIMER_IRQ IRQ_TIMER2 + +#define NR_IRQS (NORMAL_IRQ_NUM + GPIO_IRQ_NUM) + +#endif /* __MACH_IRQS_H__ */ |