diff options
author | Rob Herring <rob.herring@calxeda.com> | 2011-06-07 10:02:55 -0500 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2011-10-31 14:14:00 +0100 |
commit | 220e6cf7b793d702596506a8c4bf1f4fd4040df1 (patch) | |
tree | ba9f94611ca71799e67a66555c5124a0be975920 /arch/arm/mach-highbank/sysregs.h | |
parent | 253d7addbcb06acc90eb722f122d32a6ccbf67a7 (diff) |
ARM: add Highbank core platform support
This adds basic support for the Calxeda Highbank platform.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Reviewed-by: Jamie Iles <jamie@jamieiles.com>
Reviewed-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/mach-highbank/sysregs.h')
-rw-r--r-- | arch/arm/mach-highbank/sysregs.h | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/arch/arm/mach-highbank/sysregs.h b/arch/arm/mach-highbank/sysregs.h new file mode 100644 index 00000000000..0e913389f44 --- /dev/null +++ b/arch/arm/mach-highbank/sysregs.h @@ -0,0 +1,52 @@ +/* + * Copyright 2011 Calxeda, Inc. + * + * This program is free software; you can redistribute it and/or modify it + * under the terms and conditions of the GNU General Public License, + * version 2, as published by the Free Software Foundation. + * + * This program is distributed in the hope it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + * You should have received a copy of the GNU General Public License along with + * this program. If not, see <http://www.gnu.org/licenses/>. + */ +#ifndef _MACH_HIGHBANK__SYSREGS_H_ +#define _MACH_HIGHBANK__SYSREGS_H_ + +#include <linux/io.h> + +extern void __iomem *sregs_base; + +#define HB_SREG_A9_PWR_REQ 0xf00 +#define HB_SREG_A9_BOOT_STAT 0xf04 +#define HB_SREG_A9_BOOT_DATA 0xf08 + +#define HB_PWR_SUSPEND 0 +#define HB_PWR_SOFT_RESET 1 +#define HB_PWR_HARD_RESET 2 +#define HB_PWR_SHUTDOWN 3 + +static inline void hignbank_set_pwr_suspend(void) +{ + writel(HB_PWR_SUSPEND, sregs_base + HB_SREG_A9_PWR_REQ); +} + +static inline void hignbank_set_pwr_shutdown(void) +{ + writel(HB_PWR_SHUTDOWN, sregs_base + HB_SREG_A9_PWR_REQ); +} + +static inline void hignbank_set_pwr_soft_reset(void) +{ + writel(HB_PWR_SOFT_RESET, sregs_base + HB_SREG_A9_PWR_REQ); +} + +static inline void hignbank_set_pwr_hard_reset(void) +{ + writel(HB_PWR_HARD_RESET, sregs_base + HB_SREG_A9_PWR_REQ); +} + +#endif |