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authorLinus Torvalds <torvalds@linux-foundation.org>2008-07-14 16:06:58 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2008-07-14 16:06:58 -0700
commit85082fd7cbe3173198aac0eb5e85ab1edcc6352c (patch)
treeedbc09b7945994f78668d218fa02e991c3b3b365 /arch/arm/mach-imx/clock.c
parent666484f0250db2e016948d63b3ef33e202e3b8d0 (diff)
parent53ffe3b440aa85af6fc4eda09b2d44bcdd312d4d (diff)
Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm
* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (241 commits) [ARM] 5171/1: ep93xx: fix compilation of modules using clocks [ARM] 5133/2: at91sam9g20 defconfig file [ARM] 5130/4: Support for the at91sam9g20 [ARM] 5160/1: IOP3XX: gpio/gpiolib support [ARM] at91: Fix NAND FLASH timings for at91sam9x evaluation kits. [ARM] 5084/1: zylonite: Register AC97 device [ARM] 5085/2: PXA: Move AC97 over to the new central device declaration model [ARM] 5120/1: pxa: correct platform driver names for PXA25x and PXA27x UDC drivers [ARM] 5147/1: pxaficp_ir: drop pxa_gpio_mode calls, as pin setting [ARM] 5145/1: PXA2xx: provide api to control IrDA pins state [ARM] 5144/1: pxaficp_ir: cleanup includes [ARM] pxa: remove pxa_set_cken() [ARM] pxa: allow clk aliases [ARM] Feroceon: don't disable BPU on boot [ARM] Orion: LED support for HP mv2120 [ARM] Orion: add RD88F5181L-FXO support [ARM] Orion: add RD88F5181L-GE support [ARM] Orion: add Netgear WNR854T support [ARM] s3c2410_defconfig: update for current build [ARM] Acer n30: Minor style and indentation fixes. ...
Diffstat (limited to 'arch/arm/mach-imx/clock.c')
-rw-r--r--arch/arm/mach-imx/clock.c205
1 files changed, 205 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/clock.c b/arch/arm/mach-imx/clock.c
new file mode 100644
index 00000000000..6a90fe5578d
--- /dev/null
+++ b/arch/arm/mach-imx/clock.c
@@ -0,0 +1,205 @@
+/*
+ * Copyright (C) 2008 Sascha Hauer <s.hauer@pengutronix.de>, Pengutronix
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/list.h>
+#include <linux/math64.h>
+#include <linux/err.h>
+
+#include <asm/io.h>
+#include <asm/arch/imx-regs.h>
+
+/*
+ * Very simple approach: We can't disable clocks, so we do
+ * not need refcounting
+ */
+
+struct clk {
+ struct list_head node;
+ const char *name;
+ unsigned long (*get_rate)(void);
+};
+
+/*
+ * get the system pll clock in Hz
+ *
+ * mfi + mfn / (mfd +1)
+ * f = 2 * f_ref * --------------------
+ * pd + 1
+ */
+static unsigned long imx_decode_pll(unsigned int pll, u32 f_ref)
+{
+ unsigned long long ll;
+ unsigned long quot;
+
+ u32 mfi = (pll >> 10) & 0xf;
+ u32 mfn = pll & 0x3ff;
+ u32 mfd = (pll >> 16) & 0x3ff;
+ u32 pd = (pll >> 26) & 0xf;
+
+ mfi = mfi <= 5 ? 5 : mfi;
+
+ ll = 2 * (unsigned long long)f_ref *
+ ((mfi << 16) + (mfn << 16) / (mfd + 1));
+ quot = (pd + 1) * (1 << 16);
+ ll += quot / 2;
+ do_div(ll, quot);
+ return (unsigned long)ll;
+}
+
+static unsigned long imx_get_system_clk(void)
+{
+ u32 f_ref = (CSCR & CSCR_SYSTEM_SEL) ? 16000000 : (CLK32 * 512);
+
+ return imx_decode_pll(SPCTL0, f_ref);
+}
+
+static unsigned long imx_get_mcu_clk(void)
+{
+ return imx_decode_pll(MPCTL0, CLK32 * 512);
+}
+
+/*
+ * get peripheral clock 1 ( UART[12], Timer[12], PWM )
+ */
+static unsigned long imx_get_perclk1(void)
+{
+ return imx_get_system_clk() / (((PCDR) & 0xf)+1);
+}
+
+/*
+ * get peripheral clock 2 ( LCD, SD, SPI[12] )
+ */
+static unsigned long imx_get_perclk2(void)
+{
+ return imx_get_system_clk() / (((PCDR>>4) & 0xf)+1);
+}
+
+/*
+ * get peripheral clock 3 ( SSI )
+ */
+static unsigned long imx_get_perclk3(void)
+{
+ return imx_get_system_clk() / (((PCDR>>16) & 0x7f)+1);
+}
+
+/*
+ * get hclk ( SDRAM, CSI, Memory Stick, I2C, DMA )
+ */
+static unsigned long imx_get_hclk(void)
+{
+ return imx_get_system_clk() / (((CSCR>>10) & 0xf)+1);
+}
+
+static struct clk clk_system_clk = {
+ .name = "system_clk",
+ .get_rate = imx_get_system_clk,
+};
+
+static struct clk clk_hclk = {
+ .name = "hclk",
+ .get_rate = imx_get_hclk,
+};
+
+static struct clk clk_mcu_clk = {
+ .name = "mcu_clk",
+ .get_rate = imx_get_mcu_clk,
+};
+
+static struct clk clk_perclk1 = {
+ .name = "perclk1",
+ .get_rate = imx_get_perclk1,
+};
+
+static struct clk clk_uart_clk = {
+ .name = "uart_clk",
+ .get_rate = imx_get_perclk1,
+};
+
+static struct clk clk_perclk2 = {
+ .name = "perclk2",
+ .get_rate = imx_get_perclk2,
+};
+
+static struct clk clk_perclk3 = {
+ .name = "perclk3",
+ .get_rate = imx_get_perclk3,
+};
+
+static struct clk *clks[] = {
+ &clk_perclk1,
+ &clk_perclk2,
+ &clk_perclk3,
+ &clk_system_clk,
+ &clk_hclk,
+ &clk_mcu_clk,
+ &clk_uart_clk,
+};
+
+static LIST_HEAD(clocks);
+static DEFINE_MUTEX(clocks_mutex);
+
+struct clk *clk_get(struct device *dev, const char *id)
+{
+ struct clk *p, *clk = ERR_PTR(-ENOENT);
+
+ mutex_lock(&clocks_mutex);
+ list_for_each_entry(p, &clocks, node) {
+ if (!strcmp(p->name, id)) {
+ clk = p;
+ goto found;
+ }
+ }
+
+found:
+ mutex_unlock(&clocks_mutex);
+
+ return clk;
+}
+
+void clk_put(struct clk *clk)
+{
+}
+
+int clk_enable(struct clk *clk)
+{
+ return 0;
+}
+
+void clk_disable(struct clk *clk)
+{
+}
+
+unsigned long clk_get_rate(struct clk *clk)
+{
+ return clk->get_rate();
+}
+
+int imx_clocks_init(void)
+{
+ int i;
+
+ mutex_lock(&clocks_mutex);
+ for (i = 0; i < ARRAY_SIZE(clks); i++)
+ list_add(&clks[i]->node, &clocks);
+ mutex_unlock(&clocks_mutex);
+
+ return 0;
+}
+