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authorArnd Bergmann <arnd@arndb.de>2012-11-16 16:59:17 +0100
committerArnd Bergmann <arnd@arndb.de>2012-11-16 16:59:17 +0100
commitdb2f95de7e6ab3d5cd7cc047bb09eb9ada07e3ba (patch)
tree46543712dbbb15075f7532621b0311f1de653e57 /arch/arm/mach-imx/cpu.c
parent1bf0bc1e050fc425cc776b10d3ce8754389aabbe (diff)
parentd6aef84a48fa54ac606ae719fcd125199939f43d (diff)
Merge tag 'imx-soc' of git://git.pengutronix.de/git/imx/linux-2.6 into next/soc
From Sascha Hauer <s.hauer@pengutronix.de>: ARM i.MX SoC updates based on imx-multiplatform branch. * tag 'imx-soc' of git://git.pengutronix.de/git/imx/linux-2.6: ARM i.MX51 babbage: Add display support ARM i.MX6: Add IPU support ARM i.MX51: Add IPU support ARM i.MX53: Add IPU support ARM i.MX5: switch IPU clk support to devicetree bindings ARM i.MX6: fix ldb_di_sel mux ARM i.MX51: setup MIPI during startup mx2_camera: Fix regression caused by clock conversion ARM: clk-imx27: Add missing clock for mx2-camera ARM i.MX27: Fix low reference clock path ARM: dts: imx27-3ds: Remove local watchdog inclusion watchdog: Support imx watchdog on SOC_IMX53 ARM: mach-imx: Support for DryIce RTC in i.MX53 ARM : i.MX27 : split code for allocation of ressources of camera and eMMA Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-imx/cpu.c')
-rw-r--r--arch/arm/mach-imx/cpu.c45
1 files changed, 45 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c
new file mode 100644
index 00000000000..03fcbd08259
--- /dev/null
+++ b/arch/arm/mach-imx/cpu.c
@@ -0,0 +1,45 @@
+
+#include <linux/module.h>
+#include <linux/io.h>
+
+#include "hardware.h"
+
+unsigned int __mxc_cpu_type;
+EXPORT_SYMBOL(__mxc_cpu_type);
+
+void mxc_set_cpu_type(unsigned int type)
+{
+ __mxc_cpu_type = type;
+}
+
+void imx_print_silicon_rev(const char *cpu, int srev)
+{
+ if (srev == IMX_CHIP_REVISION_UNKNOWN)
+ pr_info("CPU identified as %s, unknown revision\n", cpu);
+ else
+ pr_info("CPU identified as %s, silicon rev %d.%d\n",
+ cpu, (srev >> 4) & 0xf, srev & 0xf);
+}
+
+void __init imx_set_aips(void __iomem *base)
+{
+ unsigned int reg;
+/*
+ * Set all MPROTx to be non-bufferable, trusted for R/W,
+ * not forced to user-mode.
+ */
+ __raw_writel(0x77777777, base + 0x0);
+ __raw_writel(0x77777777, base + 0x4);
+
+/*
+ * Set all OPACRx to be non-bufferable, to not require
+ * supervisor privilege level for access, allow for
+ * write access and untrusted master access.
+ */
+ __raw_writel(0x0, base + 0x40);
+ __raw_writel(0x0, base + 0x44);
+ __raw_writel(0x0, base + 0x48);
+ __raw_writel(0x0, base + 0x4C);
+ reg = __raw_readl(base + 0x50) & 0x00FFFFFF;
+ __raw_writel(reg, base + 0x50);
+}