diff options
author | Arnd Bergmann <arnd@arndb.de> | 2012-11-16 16:59:17 +0100 |
---|---|---|
committer | Arnd Bergmann <arnd@arndb.de> | 2012-11-16 16:59:17 +0100 |
commit | db2f95de7e6ab3d5cd7cc047bb09eb9ada07e3ba (patch) | |
tree | 46543712dbbb15075f7532621b0311f1de653e57 /arch/arm/mach-imx/devices/platform-imx-i2c.c | |
parent | 1bf0bc1e050fc425cc776b10d3ce8754389aabbe (diff) | |
parent | d6aef84a48fa54ac606ae719fcd125199939f43d (diff) |
Merge tag 'imx-soc' of git://git.pengutronix.de/git/imx/linux-2.6 into next/soc
From Sascha Hauer <s.hauer@pengutronix.de>:
ARM i.MX SoC updates
based on imx-multiplatform branch.
* tag 'imx-soc' of git://git.pengutronix.de/git/imx/linux-2.6:
ARM i.MX51 babbage: Add display support
ARM i.MX6: Add IPU support
ARM i.MX51: Add IPU support
ARM i.MX53: Add IPU support
ARM i.MX5: switch IPU clk support to devicetree bindings
ARM i.MX6: fix ldb_di_sel mux
ARM i.MX51: setup MIPI during startup
mx2_camera: Fix regression caused by clock conversion
ARM: clk-imx27: Add missing clock for mx2-camera
ARM i.MX27: Fix low reference clock path
ARM: dts: imx27-3ds: Remove local watchdog inclusion
watchdog: Support imx watchdog on SOC_IMX53
ARM: mach-imx: Support for DryIce RTC in i.MX53
ARM : i.MX27 : split code for allocation of ressources of camera and eMMA
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-imx/devices/platform-imx-i2c.c')
-rw-r--r-- | arch/arm/mach-imx/devices/platform-imx-i2c.c | 128 |
1 files changed, 128 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/devices/platform-imx-i2c.c b/arch/arm/mach-imx/devices/platform-imx-i2c.c new file mode 100644 index 00000000000..8e30e5703cd --- /dev/null +++ b/arch/arm/mach-imx/devices/platform-imx-i2c.c @@ -0,0 +1,128 @@ +/* + * Copyright (C) 2009-2010 Pengutronix + * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de> + * + * This program is free software; you can redistribute it and/or modify it under + * the terms of the GNU General Public License version 2 as published by the + * Free Software Foundation. + */ +#include "../hardware.h" +#include "devices-common.h" + +#define imx_imx_i2c_data_entry_single(soc, _devid, _id, _hwid, _size) \ + { \ + .devid = _devid, \ + .id = _id, \ + .iobase = soc ## _I2C ## _hwid ## _BASE_ADDR, \ + .iosize = _size, \ + .irq = soc ## _INT_I2C ## _hwid, \ + } + +#define imx_imx_i2c_data_entry(soc, _devid, _id, _hwid, _size) \ + [_id] = imx_imx_i2c_data_entry_single(soc, _devid, _id, _hwid, _size) + +#ifdef CONFIG_SOC_IMX1 +const struct imx_imx_i2c_data imx1_imx_i2c_data __initconst = + imx_imx_i2c_data_entry_single(MX1, "imx1-i2c", 0, , SZ_4K); +#endif /* ifdef CONFIG_SOC_IMX1 */ + +#ifdef CONFIG_SOC_IMX21 +const struct imx_imx_i2c_data imx21_imx_i2c_data __initconst = + imx_imx_i2c_data_entry_single(MX21, "imx21-i2c", 0, , SZ_4K); +#endif /* ifdef CONFIG_SOC_IMX21 */ + +#ifdef CONFIG_SOC_IMX25 +const struct imx_imx_i2c_data imx25_imx_i2c_data[] __initconst = { +#define imx25_imx_i2c_data_entry(_id, _hwid) \ + imx_imx_i2c_data_entry(MX25, "imx21-i2c", _id, _hwid, SZ_16K) + imx25_imx_i2c_data_entry(0, 1), + imx25_imx_i2c_data_entry(1, 2), + imx25_imx_i2c_data_entry(2, 3), +}; +#endif /* ifdef CONFIG_SOC_IMX25 */ + +#ifdef CONFIG_SOC_IMX27 +const struct imx_imx_i2c_data imx27_imx_i2c_data[] __initconst = { +#define imx27_imx_i2c_data_entry(_id, _hwid) \ + imx_imx_i2c_data_entry(MX27, "imx21-i2c", _id, _hwid, SZ_4K) + imx27_imx_i2c_data_entry(0, 1), + imx27_imx_i2c_data_entry(1, 2), +}; +#endif /* ifdef CONFIG_SOC_IMX27 */ + +#ifdef CONFIG_SOC_IMX31 +const struct imx_imx_i2c_data imx31_imx_i2c_data[] __initconst = { +#define imx31_imx_i2c_data_entry(_id, _hwid) \ + imx_imx_i2c_data_entry(MX31, "imx21-i2c", _id, _hwid, SZ_4K) + imx31_imx_i2c_data_entry(0, 1), + imx31_imx_i2c_data_entry(1, 2), + imx31_imx_i2c_data_entry(2, 3), +}; +#endif /* ifdef CONFIG_SOC_IMX31 */ + +#ifdef CONFIG_SOC_IMX35 +const struct imx_imx_i2c_data imx35_imx_i2c_data[] __initconst = { +#define imx35_imx_i2c_data_entry(_id, _hwid) \ + imx_imx_i2c_data_entry(MX35, "imx21-i2c", _id, _hwid, SZ_4K) + imx35_imx_i2c_data_entry(0, 1), + imx35_imx_i2c_data_entry(1, 2), + imx35_imx_i2c_data_entry(2, 3), +}; +#endif /* ifdef CONFIG_SOC_IMX35 */ + +#ifdef CONFIG_SOC_IMX50 +const struct imx_imx_i2c_data imx50_imx_i2c_data[] __initconst = { +#define imx50_imx_i2c_data_entry(_id, _hwid) \ + imx_imx_i2c_data_entry(MX50, "imx21-i2c", _id, _hwid, SZ_4K) + imx50_imx_i2c_data_entry(0, 1), + imx50_imx_i2c_data_entry(1, 2), + imx50_imx_i2c_data_entry(2, 3), +}; +#endif /* ifdef CONFIG_SOC_IMX51 */ + +#ifdef CONFIG_SOC_IMX51 +const struct imx_imx_i2c_data imx51_imx_i2c_data[] __initconst = { +#define imx51_imx_i2c_data_entry(_id, _hwid) \ + imx_imx_i2c_data_entry(MX51, "imx21-i2c", _id, _hwid, SZ_4K) + imx51_imx_i2c_data_entry(0, 1), + imx51_imx_i2c_data_entry(1, 2), + { + .devid = "imx21-i2c", + .id = 2, + .iobase = MX51_HSI2C_DMA_BASE_ADDR, + .iosize = SZ_16K, + .irq = MX51_INT_HS_I2C, + }, +}; +#endif /* ifdef CONFIG_SOC_IMX51 */ + +#ifdef CONFIG_SOC_IMX53 +const struct imx_imx_i2c_data imx53_imx_i2c_data[] __initconst = { +#define imx53_imx_i2c_data_entry(_id, _hwid) \ + imx_imx_i2c_data_entry(MX53, "imx21-i2c", _id, _hwid, SZ_4K) + imx53_imx_i2c_data_entry(0, 1), + imx53_imx_i2c_data_entry(1, 2), + imx53_imx_i2c_data_entry(2, 3), +}; +#endif /* ifdef CONFIG_SOC_IMX53 */ + +struct platform_device *__init imx_add_imx_i2c( + const struct imx_imx_i2c_data *data, + const struct imxi2c_platform_data *pdata) +{ + struct resource res[] = { + { + .start = data->iobase, + .end = data->iobase + data->iosize - 1, + .flags = IORESOURCE_MEM, + }, { + .start = data->irq, + .end = data->irq, + .flags = IORESOURCE_IRQ, + }, + }; + + return imx_add_platform_device(data->devid, data->id, + res, ARRAY_SIZE(res), + pdata, sizeof(*pdata)); +} |