diff options
| author | Philipp Zabel <p.zabel@pengutronix.de> | 2013-03-28 17:35:22 +0100 |
|---|---|---|
| committer | Shawn Guo <shawn.guo@linaro.org> | 2013-04-09 22:53:37 +0800 |
| commit | bd3d924d71a45b88941b50ddaa77aadb2ae4ded7 (patch) | |
| tree | 093e2228dfad4f2c797c82135093d2763708f386 /arch/arm/mach-imx/mm-imx5.c | |
| parent | 8d84c3740fb0c97b5b01ad565f9d4e2ca84bf670 (diff) | |
ARM i.MX5: Add System Reset Controller (SRC) support for i.MX51 and i.MX53
The SRC in i.MX51 and i.MX53 is similar to the one in i.MX6q minus
the IPU2 reset line and multi core CPU reset/enable bits.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Pavel Machek <pavel@ucw.cz>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/mach-imx/mm-imx5.c')
| -rw-r--r-- | arch/arm/mach-imx/mm-imx5.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/mm-imx5.c b/arch/arm/mach-imx/mm-imx5.c index cf34994cfe2..b7c4e70e508 100644 --- a/arch/arm/mach-imx/mm-imx5.c +++ b/arch/arm/mach-imx/mm-imx5.c @@ -84,6 +84,7 @@ void __init imx51_init_early(void) mxc_set_cpu_type(MXC_CPU_MX51); mxc_iomux_v3_init(MX51_IO_ADDRESS(MX51_IOMUXC_BASE_ADDR)); mxc_arch_reset_init(MX51_IO_ADDRESS(MX51_WDOG1_BASE_ADDR)); + imx_src_init(); } void __init imx53_init_early(void) @@ -91,6 +92,7 @@ void __init imx53_init_early(void) mxc_set_cpu_type(MXC_CPU_MX53); mxc_iomux_v3_init(MX53_IO_ADDRESS(MX53_IOMUXC_BASE_ADDR)); mxc_arch_reset_init(MX53_IO_ADDRESS(MX53_WDOG1_BASE_ADDR)); + imx_src_init(); } void __init mx51_init_irq(void) |