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| author | Arnd Bergmann <arnd@arndb.de> | 2012-01-07 12:44:37 +0000 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2012-01-07 20:40:51 +0000 |
| commit | b001befe58691ef3627458cd814e8cee7f845c5f (patch) | |
| tree | 1083f1a1cd3feeceeac4b395534df0ff032fdbc8 /arch/arm/mach-imx/src.c | |
| parent | 31b2a868451d630bacfdeddc626371b3f9d9a01c (diff) | |
| parent | 928a11ba36f999436915ea2b1eadf54301f93059 (diff) | |
Merge branch 'samsung/dt' into next/dt
* samsung/dt: (3 commit)
Merge branch 'depends/rmk/for-linus' into samsung/dt
Merge branch 'depends/rmk/restart' into next/cleanup
Merge branch 'next/cleanup' into samsung/dt
Conflicts:
arch/arm/mach-tegra/board-dt.c
arch/arm/mach-tegra/include/mach/entry-macro.S
The latest version of the samsung/dt branch resolves
all sorts of conflicts with the latest upstream, no functional
changes that are not already there.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-imx/src.c')
| -rw-r--r-- | arch/arm/mach-imx/src.c | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/src.c b/arch/arm/mach-imx/src.c index a8e33681b73..4bde04f99e3 100644 --- a/arch/arm/mach-imx/src.c +++ b/arch/arm/mach-imx/src.c @@ -19,6 +19,7 @@ #define SRC_SCR 0x000 #define SRC_GPR1 0x020 +#define BP_SRC_SCR_WARM_RESET_ENABLE 0 #define BP_SRC_SCR_CORE1_RST 14 #define BP_SRC_SCR_CORE1_ENABLE 22 @@ -46,11 +47,33 @@ void imx_set_cpu_jump(int cpu, void *jump_addr) src_base + SRC_GPR1 + cpu * 8); } +void imx_src_prepare_restart(void) +{ + u32 val; + + /* clear enable bits of secondary cores */ + val = readl_relaxed(src_base + SRC_SCR); + val &= ~(0x7 << BP_SRC_SCR_CORE1_ENABLE); + writel_relaxed(val, src_base + SRC_SCR); + + /* clear persistent entry register of primary core */ + writel_relaxed(0, src_base + SRC_GPR1); +} + void __init imx_src_init(void) { struct device_node *np; + u32 val; np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-src"); src_base = of_iomap(np, 0); WARN_ON(!src_base); + + /* + * force warm reset sources to generate cold reset + * for a more reliable restart + */ + val = readl_relaxed(src_base + SRC_SCR); + val &= ~(1 << BP_SRC_SCR_WARM_RESET_ENABLE); + writel_relaxed(val, src_base + SRC_SCR); } |