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authorKevin Hilman <khilman@linaro.org>2013-08-23 11:58:01 -0700
committerKevin Hilman <khilman@linaro.org>2013-08-23 11:58:18 -0700
commit334b0f0913a1a980d3167c3bc4415a788225125f (patch)
tree676d3bbd924fc9c7b1cc0bbf054c3259d4be4bcb /arch/arm/mach-imx
parent579673ee1ad62604910c6b8f431aa2a0951589b6 (diff)
parentd45393cd32016ea76a364d1f2e7b58720b2f8135 (diff)
Merge tag 'imx-dt-3.12' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/soc
From Shawn Guo: It contains the imx device tree updates for 3.12. - New pinctrl entry additions for various peripherals - Devices enabling for imx6, imx5 and imx27 boards - Add missing device nodes like iim, owire, audmux and sram, etc. - Various updates on boards like phytec, wandboard and sabresd - Consolidate pad macros between imx6q and imx6dl * tag 'imx-dt-3.12' of git://git.linaro.org/people/shawnguo/linux-2.6: (92 commits) ARM: dts: vf610-twr: enable i2c0 device ARM: dts: i.MX51: Add one more I2C2 pinmux entry ARM: dts: i.MX51: Move pins configuration under "iomuxc" label ARM: dtsi: imx6qdl-sabresd: Add USB OTG vbus pin to pinctrl_hog ARM: dtsi: imx6qdl-sabresd: Add USB host 1 VBUS regulator ARM: dts: imx27-phytec-phycore-som: Enable AUDMUX ARM: dts: i.MX27: Disable AUDMUX in the template ARM: dts: wandboard: Add support for SDIO bcm4329 ARM: i.MX5 clocks: Remove optional clock setup (CKIH1) from i.MX51 template ARM: dts: imx53-qsb: Make USBH1 functional ARM i.MX6Q: dts: Enable I2C1 with EEPROM and PMIC on Phytec phyFLEX-i.MX6 Ouad module ARM i.MX6Q: dts: Enable SPI NOR flash on Phytec phyFLEX-i.MX6 Ouad module ARM: dts: imx6qdl-sabresd: Add touchscreen support ARM: imx: add ocram clock for imx53 ARM: dts: imx: ocram size is different between imx6q and imx6dl ARM: dts: imx27-phytec-phycore-som: Fix regulator settings ARM: dts: i.MX27: Remove clock name from CPU node ARM: dts: i.MX27: Increase "clock-latency" value ARM: dts: i.MX27: Add label to CPU node ARM: dts: i.MX27: Remove optional "ptp" clock source for FEC ... Signed-off-by: Kevin Hilman <khilman@linaro.org>
Diffstat (limited to 'arch/arm/mach-imx')
-rw-r--r--arch/arm/mach-imx/clk-imx51-imx53.c3
-rw-r--r--arch/arm/mach-imx/clk-imx6q.c11
-rw-r--r--arch/arm/mach-imx/mach-imx6q.c69
3 files changed, 13 insertions, 70 deletions
diff --git a/arch/arm/mach-imx/clk-imx51-imx53.c b/arch/arm/mach-imx/clk-imx51-imx53.c
index 9afac26fa1c..1a56a331999 100644
--- a/arch/arm/mach-imx/clk-imx51-imx53.c
+++ b/arch/arm/mach-imx/clk-imx51-imx53.c
@@ -119,7 +119,7 @@ enum imx5_clks {
srtc_gate, pata_gate, sata_gate, spdif_xtal_sel, spdif0_sel,
spdif1_sel, spdif0_pred, spdif0_podf, spdif1_pred, spdif1_podf,
spdif0_com_s, spdif1_com_sel, spdif0_gate, spdif1_gate, spdif_ipg_gate,
- clk_max
+ ocram, clk_max
};
static struct clk *clk[clk_max];
@@ -506,6 +506,7 @@ int __init mx53_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
mx53_can_sel, ARRAY_SIZE(mx53_can_sel));
clk[can1_serial_gate] = imx_clk_gate2("can1_serial_gate", "can_sel", MXC_CCM_CCGR6, 22);
clk[can1_ipg_gate] = imx_clk_gate2("can1_ipg_gate", "ipg", MXC_CCM_CCGR6, 20);
+ clk[ocram] = imx_clk_gate2("ocram", "ahb", MXC_CCM_CCGR6, 2);
clk[can2_serial_gate] = imx_clk_gate2("can2_serial_gate", "can_sel", MXC_CCM_CCGR4, 8);
clk[can2_ipg_gate] = imx_clk_gate2("can2_ipg_gate", "ipg", MXC_CCM_CCGR4, 6);
clk[i2c3_gate] = imx_clk_gate2("i2c3_gate", "per_root", MXC_CCM_CCGR1, 22);
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index bbafa3ccacb..9181a241d3a 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -288,6 +288,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
struct device_node *np;
void __iomem *base;
int i, irq;
+ int ret;
clk[dummy] = imx_clk_fixed("dummy", 0);
clk[ckil] = imx_obtain_fixed_clock("ckil", 0);
@@ -592,6 +593,16 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
clk_prepare_enable(clk[usbphy2_gate]);
}
+ /*
+ * Let's initially set up CLKO with OSC24M, since this configuration
+ * is widely used by imx6q board designs to clock audio codec.
+ */
+ ret = clk_set_parent(clk[cko2_sel], clk[osc]);
+ if (!ret)
+ ret = clk_set_parent(clk[cko], clk[cko2]);
+ if (ret)
+ pr_warn("failed to set up CLKO: %d\n", ret);
+
/* Set initial power mode */
imx6q_set_lpm(WAIT_CLOCKED);
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 1e093abe7b9..b60509831d6 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -162,30 +162,6 @@ static int ar8031_phy_fixup(struct phy_device *dev)
return 0;
}
-static void __init imx6q_sabrelite_cko1_setup(void)
-{
- struct clk *cko1_sel, *ahb, *cko1;
- unsigned long rate;
-
- cko1_sel = clk_get_sys(NULL, "cko1_sel");
- ahb = clk_get_sys(NULL, "ahb");
- cko1 = clk_get_sys(NULL, "cko1");
- if (IS_ERR(cko1_sel) || IS_ERR(ahb) || IS_ERR(cko1)) {
- pr_err("cko1 setup failed!\n");
- goto put_clk;
- }
- clk_set_parent(cko1_sel, ahb);
- rate = clk_round_rate(cko1, 16000000);
- clk_set_rate(cko1, rate);
-put_clk:
- if (!IS_ERR(cko1_sel))
- clk_put(cko1_sel);
- if (!IS_ERR(ahb))
- clk_put(ahb);
- if (!IS_ERR(cko1))
- clk_put(cko1);
-}
-
#define PHY_ID_AR8031 0x004dd074
static void __init imx6q_enet_phy_init(void)
@@ -200,45 +176,6 @@ static void __init imx6q_enet_phy_init(void)
}
}
-static void __init imx6q_sabresd_cko1_setup(void)
-{
- struct clk *cko1_sel, *pll4, *pll4_post, *cko1;
- unsigned long rate;
-
- cko1_sel = clk_get_sys(NULL, "cko1_sel");
- pll4 = clk_get_sys(NULL, "pll4_audio");
- pll4_post = clk_get_sys(NULL, "pll4_post_div");
- cko1 = clk_get_sys(NULL, "cko1");
- if (IS_ERR(cko1_sel) || IS_ERR(pll4)
- || IS_ERR(pll4_post) || IS_ERR(cko1)) {
- pr_err("cko1 setup failed!\n");
- goto put_clk;
- }
- /*
- * Setting pll4 at 768MHz (24MHz * 32)
- * So its child clock can get 24MHz easily
- */
- clk_set_rate(pll4, 768000000);
-
- clk_set_parent(cko1_sel, pll4_post);
- rate = clk_round_rate(cko1, 24000000);
- clk_set_rate(cko1, rate);
-put_clk:
- if (!IS_ERR(cko1_sel))
- clk_put(cko1_sel);
- if (!IS_ERR(pll4_post))
- clk_put(pll4_post);
- if (!IS_ERR(pll4))
- clk_put(pll4);
- if (!IS_ERR(cko1))
- clk_put(cko1);
-}
-
-static void __init imx6q_sabresd_init(void)
-{
- imx6q_sabresd_cko1_setup();
-}
-
static void __init imx6q_1588_init(void)
{
struct regmap *gpr;
@@ -255,12 +192,6 @@ static void __init imx6q_1588_init(void)
static void __init imx6q_init_machine(void)
{
- if (of_machine_is_compatible("fsl,imx6q-sabrelite"))
- imx6q_sabrelite_cko1_setup();
- else if (of_machine_is_compatible("fsl,imx6q-sabresd") ||
- of_machine_is_compatible("fsl,imx6dl-sabresd"))
- imx6q_sabresd_init();
-
imx6q_enet_phy_init();
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);