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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2006-03-26 23:13:39 +0100
committerRussell King <rmk+kernel@arm.linux.org.uk>2006-03-26 23:13:39 +0100
commitfbb18a277a6f192404aa20ece49529acb1e1e76d (patch)
tree2ae2b039d05ce15ad6e0f7209877aaf918f8f24a /arch/arm/mach-integrator
parent335bd9dff31d042b773591933d3ee5bd62d5ea27 (diff)
[SERIAL] amba-pl010: allow platforms to specify modem control method
The amba-pl010 hardware does not provide RTS and DTR control lines; it is expected that these will be implemented using GPIO. Allow platforms to supply a function to implement manipulation of modem control lines. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-integrator')
-rw-r--r--arch/arm/mach-integrator/core.c46
1 files changed, 46 insertions, 0 deletions
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c
index 20071a2767c..576a5e979c0 100644
--- a/arch/arm/mach-integrator/core.c
+++ b/arch/arm/mach-integrator/core.c
@@ -15,7 +15,9 @@
#include <linux/interrupt.h>
#include <linux/sched.h>
#include <linux/smp.h>
+#include <linux/termios.h>
#include <linux/amba/bus.h>
+#include <linux/amba/serial.h>
#include <asm/hardware.h>
#include <asm/irq.h>
@@ -28,6 +30,8 @@
#include "common.h"
+static struct amba_pl010_data integrator_uart_data;
+
static struct amba_device rtc_device = {
.dev = {
.bus_id = "mb:15",
@@ -44,6 +48,7 @@ static struct amba_device rtc_device = {
static struct amba_device uart0_device = {
.dev = {
.bus_id = "mb:16",
+ .platform_data = &integrator_uart_data,
},
.res = {
.start = INTEGRATOR_UART0_BASE,
@@ -57,6 +62,7 @@ static struct amba_device uart0_device = {
static struct amba_device uart1_device = {
.dev = {
.bus_id = "mb:17",
+ .platform_data = &integrator_uart_data,
},
.res = {
.start = INTEGRATOR_UART1_BASE,
@@ -115,6 +121,46 @@ static int __init integrator_init(void)
arch_initcall(integrator_init);
+/*
+ * On the Integrator platform, the port RTS and DTR are provided by
+ * bits in the following SC_CTRLS register bits:
+ * RTS DTR
+ * UART0 7 6
+ * UART1 5 4
+ */
+#define SC_CTRLC (IO_ADDRESS(INTEGRATOR_SC_BASE) + INTEGRATOR_SC_CTRLC_OFFSET)
+#define SC_CTRLS (IO_ADDRESS(INTEGRATOR_SC_BASE) + INTEGRATOR_SC_CTRLS_OFFSET)
+
+static void integrator_uart_set_mctrl(struct amba_device *dev, void __iomem *base, unsigned int mctrl)
+{
+ unsigned int ctrls = 0, ctrlc = 0, rts_mask, dtr_mask;
+
+ if (dev == &uart0_device) {
+ rts_mask = 1 << 4;
+ dtr_mask = 1 << 5;
+ } else {
+ rts_mask = 1 << 6;
+ dtr_mask = 1 << 7;
+ }
+
+ if (mctrl & TIOCM_RTS)
+ ctrlc |= rts_mask;
+ else
+ ctrls |= rts_mask;
+
+ if (mctrl & TIOCM_DTR)
+ ctrlc |= dtr_mask;
+ else
+ ctrls |= dtr_mask;
+
+ __raw_writel(ctrls, SC_CTRLS);
+ __raw_writel(ctrlc, SC_CTRLC);
+}
+
+static struct amba_pl010_data integrator_uart_data = {
+ .set_mctrl = integrator_uart_set_mctrl,
+};
+
#define CM_CTRL IO_ADDRESS(INTEGRATOR_HDR_BASE) + INTEGRATOR_HDR_CTRL_OFFSET
static DEFINE_SPINLOCK(cm_lock);