diff options
| author | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-05-21 10:00:22 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-05-21 10:00:22 -0700 |
| commit | d07b3c25327c5ae3792d0ed0c135dee4727200a1 (patch) | |
| tree | 2ffad8da1f9004bdeb32bf76faa08fa104797b89 /arch/arm/mach-iop33x/irq.c | |
| parent | dde33348e53ecab687a9768bf5262f0b8f79b7f2 (diff) | |
| parent | 6cbdc8c5357276307a77deeada3f04626ff17da6 (diff) | |
Merge master.kernel.org:/home/rmk/linux-2.6-arm
* master.kernel.org:/home/rmk/linux-2.6-arm: (22 commits)
[ARM] spelling fixes
[ARM] at91_adc parenthesis balance
[ARM] 4400/1: S3C24XX: Add high-speed MMC device definition
[ARM] 4399/2: S3C2443: Fix SMDK2443 nand timings
[ARM] 4398/1: S3C2443: Fix watchdog IRQ number
[ARM] 4397/1: S3C2443: remove SDI0/1 IRQ ambiguity
[ARM] 4396/1: S3C2443: Add missing HCLK clocks
[ARM] 4395/1: S3C24XX: add include of <linux/sysdev.h> to relevant machines
[ARM] 4388/1: no need for arm/mm mmap range checks for non-mmu
[ARM] 4387/1: fix /proc/cpuinfo formatting for pre-ARM7 parts
[ARM] ARMv6: add CPU_HAS_ASID configuration
[ARM] integrator: fix pci_v3 compile error with DEBUG_LL
[ARM] gic: Fix gic cascade irq handling
[ARM] Silence OMAP kernel configuration warning
[ARM] Update ARM syscalls
[ARM] 4384/1: S3C2412/13 SPI registers offset correction
[ARM] 4383/1: iop: fix usage of '__init' and 'inline' in iop files
[ARM] 4382/1: iop13xx: fix msi support
[ARM] Remove Integrator/CP SMP platform support
[ARM] 4378/1: KS8695: Serial driver fix
...
Diffstat (limited to 'arch/arm/mach-iop33x/irq.c')
| -rw-r--r-- | arch/arm/mach-iop33x/irq.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/mach-iop33x/irq.c b/arch/arm/mach-iop33x/irq.c index c65ea78a242..f09dd054b9c 100644 --- a/arch/arm/mach-iop33x/irq.c +++ b/arch/arm/mach-iop33x/irq.c @@ -22,32 +22,32 @@ static u32 iop33x_mask0; static u32 iop33x_mask1; -static inline void intctl0_write(u32 val) +static void intctl0_write(u32 val) { asm volatile("mcr p6, 0, %0, c0, c0, 0" : : "r" (val)); } -static inline void intctl1_write(u32 val) +static void intctl1_write(u32 val) { asm volatile("mcr p6, 0, %0, c1, c0, 0" : : "r" (val)); } -static inline void intstr0_write(u32 val) +static void intstr0_write(u32 val) { asm volatile("mcr p6, 0, %0, c2, c0, 0" : : "r" (val)); } -static inline void intstr1_write(u32 val) +static void intstr1_write(u32 val) { asm volatile("mcr p6, 0, %0, c3, c0, 0" : : "r" (val)); } -static inline void intbase_write(u32 val) +static void intbase_write(u32 val) { asm volatile("mcr p6, 0, %0, c12, c0, 0" : : "r" (val)); } -static inline void intsize_write(u32 val) +static void intsize_write(u32 val) { asm volatile("mcr p6, 0, %0, c13, c0, 0" : : "r" (val)); } |