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authorIngo Molnar <mingo@elte.hu>2008-10-12 12:49:27 +0200
committerIngo Molnar <mingo@elte.hu>2008-10-12 12:49:27 +0200
commit1389ac4b976abdc0555280dfc1aa2c3abcc19641 (patch)
tree1ec51aa0b1e33201f6f4f3bebc657f9ec65f8539 /arch/arm/mach-ixp2000/include/mach/ixp2000-regs.h
parent69e13ad56f9e2cd81c4f8bfd6267211c10c14c08 (diff)
parentfd048088306656824958e7783ffcee27e241b361 (diff)
Merge branch 'linus' into x86/signal
Conflicts: arch/x86/kernel/signal_64.c
Diffstat (limited to 'arch/arm/mach-ixp2000/include/mach/ixp2000-regs.h')
-rw-r--r--arch/arm/mach-ixp2000/include/mach/ixp2000-regs.h8
1 files changed, 1 insertions, 7 deletions
diff --git a/arch/arm/mach-ixp2000/include/mach/ixp2000-regs.h b/arch/arm/mach-ixp2000/include/mach/ixp2000-regs.h
index 19d80379a3e..822f63f2f4a 100644
--- a/arch/arm/mach-ixp2000/include/mach/ixp2000-regs.h
+++ b/arch/arm/mach-ixp2000/include/mach/ixp2000-regs.h
@@ -41,13 +41,7 @@
* Most of the registers are clumped in 4K regions spread throughout
* the 0xc0000000 -> 0xc0100000 address range, but we just map in
* the whole range using a single 1 MB section instead of small
- * 4K pages. This has two advantages for us:
- *
- * 1) We use only one TLB entry for large number of on-chip I/O devices.
- *
- * 2) We can easily set the Section attributes to XCB=101 on the IXP2400
- * as required per erratum #66. We accomplish this by using a
- * new MT_IXP2000_DEVICE memory type with the bits set as required.
+ * 4K pages.
*
* CAP stands for CSR Access Proxy.
*