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| author | Ingo Molnar <mingo@elte.hu> | 2008-09-24 10:31:34 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2008-09-24 10:31:34 +0200 |
| commit | e6aa0f07cb5e81a7cbeaf3be6e2101234c2f0d30 (patch) | |
| tree | 77926550ac0c31b1423bcf193a4ed0ecb7fda2c1 /arch/arm/mach-ixp4xx/include/mach/cpu.h | |
| parent | d4738792fb86600b6cb7220459d9c47e819b3580 (diff) | |
| parent | 72d31053f62c4bc464c2783974926969614a8649 (diff) | |
Merge commit 'v2.6.27-rc7' into x86/microcode
Diffstat (limited to 'arch/arm/mach-ixp4xx/include/mach/cpu.h')
| -rw-r--r-- | arch/arm/mach-ixp4xx/include/mach/cpu.h | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/arch/arm/mach-ixp4xx/include/mach/cpu.h b/arch/arm/mach-ixp4xx/include/mach/cpu.h new file mode 100644 index 00000000000..ff8aa2393bf --- /dev/null +++ b/arch/arm/mach-ixp4xx/include/mach/cpu.h @@ -0,0 +1,46 @@ +/* + * arch/arm/mach-ixp4xx/include/mach/cpu.h + * + * IXP4XX cpu type detection + * + * Copyright (C) 2007 MontaVista Software, Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + */ + +#ifndef __ASM_ARCH_CPU_H__ +#define __ASM_ARCH_CPU_H__ + +extern unsigned int processor_id; +/* Processor id value in CP15 Register 0 */ +#define IXP425_PROCESSOR_ID_VALUE 0x690541c0 +#define IXP435_PROCESSOR_ID_VALUE 0x69054040 +#define IXP465_PROCESSOR_ID_VALUE 0x69054200 +#define IXP4XX_PROCESSOR_ID_MASK 0xfffffff0 + +#define cpu_is_ixp42x() ((processor_id & IXP4XX_PROCESSOR_ID_MASK) == \ + IXP425_PROCESSOR_ID_VALUE) +#define cpu_is_ixp43x() ((processor_id & IXP4XX_PROCESSOR_ID_MASK) == \ + IXP435_PROCESSOR_ID_VALUE) +#define cpu_is_ixp46x() ((processor_id & IXP4XX_PROCESSOR_ID_MASK) == \ + IXP465_PROCESSOR_ID_VALUE) + +static inline u32 ixp4xx_read_feature_bits(void) +{ + unsigned int val = ~*IXP4XX_EXP_CFG2; + val &= ~IXP4XX_FEATURE_RESERVED; + if (!cpu_is_ixp46x()) + val &= ~IXP4XX_FEATURE_IXP46X_ONLY; + + return val; +} + +static inline void ixp4xx_write_feature_bits(u32 value) +{ + *IXP4XX_EXP_CFG2 = ~value; +} + +#endif /* _ASM_ARCH_CPU_H */ |