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author | Christoffer Dall <cdall@cs.columbia.edu> | 2013-01-20 18:28:08 -0500 |
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committer | Christoffer Dall <c.dall@virtualopensystems.com> | 2013-01-23 13:29:12 -0500 |
commit | 86ce85352f0da7e1431ad8efcb04323819a620e7 (patch) | |
tree | 0f5a0a971b0092c9cfd74659254f76a4c7117294 /arch/arm/mach-ixp4xx/ixdpg425-pci.c | |
parent | d5d8184d35c990b1324d9b30bcd0e4e8aa08f56d (diff) |
KVM: ARM: Inject IRQs and FIQs from userspace
All interrupt injection is now based on the VM ioctl KVM_IRQ_LINE. This
works semantically well for the GIC as we in fact raise/lower a line on
a machine component (the gic). The IOCTL uses the follwing struct.
struct kvm_irq_level {
union {
__u32 irq; /* GSI */
__s32 status; /* not used for KVM_IRQ_LEVEL */
};
__u32 level; /* 0 or 1 */
};
ARM can signal an interrupt either at the CPU level, or at the in-kernel irqchip
(GIC), and for in-kernel irqchip can tell the GIC to use PPIs designated for
specific cpus. The irq field is interpreted like this:
bits: | 31 ... 24 | 23 ... 16 | 15 ... 0 |
field: | irq_type | vcpu_index | irq_number |
The irq_type field has the following values:
- irq_type[0]: out-of-kernel GIC: irq_number 0 is IRQ, irq_number 1 is FIQ
- irq_type[1]: in-kernel GIC: SPI, irq_number between 32 and 1019 (incl.)
(the vcpu_index field is ignored)
- irq_type[2]: in-kernel GIC: PPI, irq_number between 16 and 31 (incl.)
The irq_number thus corresponds to the irq ID in as in the GICv2 specs.
This is documented in Documentation/kvm/api.txt.
Reviewed-by: Will Deacon <will.deacon@arm.com>
Reviewed-by: Marcelo Tosatti <mtosatti@redhat.com>
Signed-off-by: Christoffer Dall <c.dall@virtualopensystems.com>
Diffstat (limited to 'arch/arm/mach-ixp4xx/ixdpg425-pci.c')
0 files changed, 0 insertions, 0 deletions