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authorArnd Bergmann <arnd@arndb.de>2014-03-26 23:03:09 +0100
committerArnd Bergmann <arnd@arndb.de>2014-03-26 23:03:18 +0100
commit9c9c6c55a887dfe4e68d48d0829e412ed4f14ca9 (patch)
treeca529c169d9e6d63b2b184a09de1003960298046 /arch/arm/mach-ixp4xx
parent600a1dfae24746ccd8b1617742ef7b98099f83b8 (diff)
Revert "ARM: ixp4xx: fix gpio rework"
This reverts commit 48ba81f6fdb7580a5c474da1b14a338e1358e6ab. A better fix was sent by Krzysztof Halasa. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-ixp4xx')
-rw-r--r--arch/arm/mach-ixp4xx/common.c6
-rw-r--r--arch/arm/mach-ixp4xx/goramo_mlr.c7
2 files changed, 3 insertions, 10 deletions
diff --git a/arch/arm/mach-ixp4xx/common.c b/arch/arm/mach-ixp4xx/common.c
index eef39c7ad0c..df82a2b4a54 100644
--- a/arch/arm/mach-ixp4xx/common.c
+++ b/arch/arm/mach-ixp4xx/common.c
@@ -100,7 +100,7 @@ void __init ixp4xx_map_io(void)
#define IXP4XX_GPIO_CLK_0 14
#define IXP4XX_GPIO_CLK_1 15
-void gpio_line_config(u8 line, u32 direction)
+static void gpio_line_config(u8 line, u32 direction)
{
if (direction == IXP4XX_GPIO_IN)
*IXP4XX_GPIO_GPOER |= (1 << line);
@@ -108,12 +108,12 @@ void gpio_line_config(u8 line, u32 direction)
*IXP4XX_GPIO_GPOER &= ~(1 << line);
}
-void gpio_line_get(u8 line, int *value)
+static void gpio_line_get(u8 line, int *value)
{
*value = (*IXP4XX_GPIO_GPINR >> line) & 0x1;
}
-void gpio_line_set(u8 line, int value)
+static void gpio_line_set(u8 line, int value)
{
if (value == IXP4XX_GPIO_HIGH)
*IXP4XX_GPIO_GPOUTR |= (1 << line);
diff --git a/arch/arm/mach-ixp4xx/goramo_mlr.c b/arch/arm/mach-ixp4xx/goramo_mlr.c
index 5a635c657ea..e54ff491c10 100644
--- a/arch/arm/mach-ixp4xx/goramo_mlr.c
+++ b/arch/arm/mach-ixp4xx/goramo_mlr.c
@@ -17,13 +17,6 @@
#include <asm/mach/pci.h>
#include <asm/system_info.h>
-#define IXP4XX_GPIO_OUT 0x1
-#define IXP4XX_GPIO_IN 0x2
-
-void gpio_line_config(u8 line, u32 direction);
-void gpio_line_get(u8 line, int *value);
-void gpio_line_set(u8 line, int value);
-
#define SLOT_ETHA 0x0B /* IDSEL = AD21 */
#define SLOT_ETHB 0x0C /* IDSEL = AD20 */
#define SLOT_MPCI 0x0D /* IDSEL = AD19 */