diff options
author | Ingo Molnar <mingo@elte.hu> | 2009-04-29 14:46:59 +0200 |
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committer | Ingo Molnar <mingo@elte.hu> | 2009-04-29 14:47:05 +0200 |
commit | e7fd5d4b3d240f42c30a9e3d20a4689c4d3a795a (patch) | |
tree | 4ba588631dd8189a818a91c9e3976526071178b6 /arch/arm/mach-kirkwood/include/mach/bridge-regs.h | |
parent | 1130b0296184bc21806225fd06d533515a99d2db (diff) | |
parent | 56a50adda49b2020156616c4eb15353e0f9ad7de (diff) |
Merge branch 'linus' into perfcounters/core
Merge reason: This brach was on -rc1, refresh it to almost-rc4 to pick up
the latest upstream fixes.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat (limited to 'arch/arm/mach-kirkwood/include/mach/bridge-regs.h')
-rw-r--r-- | arch/arm/mach-kirkwood/include/mach/bridge-regs.h | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/arch/arm/mach-kirkwood/include/mach/bridge-regs.h b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h new file mode 100644 index 00000000000..4f7029f521c --- /dev/null +++ b/arch/arm/mach-kirkwood/include/mach/bridge-regs.h @@ -0,0 +1,42 @@ +/* + * arch/arm/mach-kirkwood/include/mach/bridge-regs.h + * + * Mbus-L to Mbus Bridge Registers + * + * This file is licensed under the terms of the GNU General Public + * License version 2. This program is licensed "as is" without any + * warranty of any kind, whether express or implied. + */ + +#ifndef __ASM_ARCH_BRIDGE_REGS_H +#define __ASM_ARCH_BRIDGE_REGS_H + +#include <mach/kirkwood.h> + +#define CPU_CONTROL (BRIDGE_VIRT_BASE | 0x0104) +#define CPU_RESET 0x00000002 + +#define RSTOUTn_MASK (BRIDGE_VIRT_BASE | 0x0108) +#define SOFT_RESET_OUT_EN 0x00000004 + +#define SYSTEM_SOFT_RESET (BRIDGE_VIRT_BASE | 0x010c) +#define SOFT_RESET 0x00000001 + +#define BRIDGE_CAUSE (BRIDGE_VIRT_BASE | 0x0110) +#define BRIDGE_MASK (BRIDGE_VIRT_BASE | 0x0114) +#define BRIDGE_INT_TIMER0 0x0002 +#define BRIDGE_INT_TIMER1 0x0004 +#define BRIDGE_INT_TIMER1_CLR (~0x0004) + +#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200) +#define IRQ_CAUSE_LOW_OFF 0x0000 +#define IRQ_MASK_LOW_OFF 0x0004 +#define IRQ_CAUSE_HIGH_OFF 0x0010 +#define IRQ_MASK_HIGH_OFF 0x0014 + +#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300) + +#define L2_CONFIG_REG (BRIDGE_VIRT_BASE | 0x0128) +#define L2_WRITETHROUGH 0x00000010 + +#endif |