diff options
| author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2009-06-08 19:27:13 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-06-08 19:27:13 +0100 |
| commit | 7698fdedcfa3cab3dd40c9b685590b23be02e267 (patch) | |
| tree | 207ddae0f963174356b1a9de7fff8e48a9c1e9c1 /arch/arm/mach-kirkwood/include/mach/kirkwood.h | |
| parent | 2d8d24935d372175786ebefa8a2de8680831b67f (diff) | |
| parent | ae5c8c83735f5fcb09b380944e4854a383006998 (diff) | |
Merge branch 'for-rmk' of git://git.marvell.com/orion into devel
Diffstat (limited to 'arch/arm/mach-kirkwood/include/mach/kirkwood.h')
| -rw-r--r-- | arch/arm/mach-kirkwood/include/mach/kirkwood.h | 18 |
1 files changed, 15 insertions, 3 deletions
diff --git a/arch/arm/mach-kirkwood/include/mach/kirkwood.h b/arch/arm/mach-kirkwood/include/mach/kirkwood.h index b3e13958821..07af858814a 100644 --- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h +++ b/arch/arm/mach-kirkwood/include/mach/kirkwood.h @@ -20,16 +20,18 @@ * f1000000 on-chip peripheral registers * f2000000 PCIe I/O space * f3000000 NAND controller address window + * f4000000 Security Accelerator SRAM * * virt phys size * fee00000 f1000000 1M on-chip peripheral registers * fef00000 f2000000 1M PCIe I/O space */ +#define KIRKWOOD_SRAM_PHYS_BASE 0xf4000000 +#define KIRKWOOD_SRAM_SIZE SZ_2K + #define KIRKWOOD_NAND_MEM_PHYS_BASE 0xf3000000 -#define KIRKWOOD_NAND_MEM_SIZE SZ_64K /* 1K is sufficient, but 64K - * is the minimal window size - */ +#define KIRKWOOD_NAND_MEM_SIZE SZ_1K #define KIRKWOOD_PCIE_IO_PHYS_BASE 0xf2000000 #define KIRKWOOD_PCIE_IO_VIRT_BASE 0xfef00000 @@ -48,6 +50,7 @@ */ #define DDR_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x00000) #define DDR_WINDOW_CPU_BASE (DDR_VIRT_BASE | 0x1500) +#define DDR_OPERATION_BASE (DDR_VIRT_BASE | 0x1418) #define DEV_BUS_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x10000) #define DEV_BUS_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x10000) @@ -63,7 +66,11 @@ #define BRIDGE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x20000) +#define CRYPTO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x30000) + #define PCIE_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x40000) +#define PCIE_LINK_CTRL (PCIE_VIRT_BASE | 0x70) +#define PCIE_STATUS (PCIE_VIRT_BASE | 0x1a04) #define USB_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x50000) @@ -80,6 +87,11 @@ #define GE01_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x74000) #define SATA_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x80000) +#define SATA_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x80000) +#define SATA0_IF_CTRL (SATA_VIRT_BASE | 0x2050) +#define SATA0_PHY_MODE_2 (SATA_VIRT_BASE | 0x2330) +#define SATA1_IF_CTRL (SATA_VIRT_BASE | 0x4050) +#define SATA1_PHY_MODE_2 (SATA_VIRT_BASE | 0x4330) #define SDIO_PHYS_BASE (KIRKWOOD_REGS_PHYS_BASE | 0x90000) |