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authorRoland Stigge <stigge@antcom.de>2012-02-27 17:28:02 +0100
committerRoland Stigge <stigge@antcom.de>2012-02-27 17:28:02 +0100
commitf6737055c1c432a9628a9a731f9881ad8e0a9eee (patch)
treed601200aac8c13adf74126157baa3bb55cd78180 /arch/arm/mach-lpc32xx/include/mach
parent6b21d18ed50c7d145220b0724ea7f2613abf0f95 (diff)
ARM: LPC32xx: Fix irq on GPI_28
The GPI_28 IRQ was not registered properly. The registration of IRQ_LPC32XX_GPI_28 was added and the (wrong) IRQ_LPC32XX_GPI_11 at LPC32XX_SIC1_IRQ(4) was replaced by IRQ_LPC32XX_GPI_28 (see manual of LPC32xx / interrupt controller). Signed-off-by: Roland Stigge <stigge@antcom.de> Cc: stable@vger.kernel.org
Diffstat (limited to 'arch/arm/mach-lpc32xx/include/mach')
-rw-r--r--arch/arm/mach-lpc32xx/include/mach/irqs.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-lpc32xx/include/mach/irqs.h b/arch/arm/mach-lpc32xx/include/mach/irqs.h
index 2667f52e3b0..9e3b90df32e 100644
--- a/arch/arm/mach-lpc32xx/include/mach/irqs.h
+++ b/arch/arm/mach-lpc32xx/include/mach/irqs.h
@@ -61,7 +61,7 @@
*/
#define IRQ_LPC32XX_JTAG_COMM_TX LPC32XX_SIC1_IRQ(1)
#define IRQ_LPC32XX_JTAG_COMM_RX LPC32XX_SIC1_IRQ(2)
-#define IRQ_LPC32XX_GPI_11 LPC32XX_SIC1_IRQ(4)
+#define IRQ_LPC32XX_GPI_28 LPC32XX_SIC1_IRQ(4)
#define IRQ_LPC32XX_TS_P LPC32XX_SIC1_IRQ(6)
#define IRQ_LPC32XX_TS_IRQ LPC32XX_SIC1_IRQ(7)
#define IRQ_LPC32XX_TS_AUX LPC32XX_SIC1_IRQ(8)