diff options
| author | Jeff Ohlstein <johlstei@codeaurora.org> | 2010-12-02 12:05:12 -0800 |
|---|---|---|
| committer | David Brown <davidb@codeaurora.org> | 2011-01-07 15:54:44 -0800 |
| commit | 94790ec25fdd51dc4126cc176f2e104f80f87fcb (patch) | |
| tree | 6df4ba7d9e71459817b3a4d39b9094ac63698f6c /arch/arm/mach-msm/include | |
| parent | 7b181446c68768e2f3231a0885095ee41261dcde (diff) | |
msm: timer: SMP timer support for msm
The msm provides timer hardware that is private to each core. Each
timer has separate counter and match registers, so we create separate
clock_event_devices for each core. For the global clocksource, use
cpu 0's counter.
Signed-off-by: Jeff Ohlstein <johlstei@codeaurora.org>
Signed-off-by: David Brown <davidb@codeaurora.org>
Diffstat (limited to 'arch/arm/mach-msm/include')
| -rw-r--r-- | arch/arm/mach-msm/include/mach/msm_iomap-8x60.h | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h index 7c43a9bff1a..a54e33b0882 100644 --- a/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h +++ b/arch/arm/mach-msm/include/mach/msm_iomap-8x60.h @@ -60,7 +60,11 @@ #define MSM_TMR_BASE IOMEM(0xF0200000) #define MSM_TMR_PHYS 0x02000000 -#define MSM_TMR_SIZE (SZ_1M) +#define MSM_TMR_SIZE SZ_4K + +#define MSM_TMR0_BASE IOMEM(0xF0201000) +#define MSM_TMR0_PHYS 0x02040000 +#define MSM_TMR0_SIZE SZ_4K #define MSM_GPT_BASE (MSM_TMR_BASE + 0x4) #define MSM_DGT_BASE (MSM_TMR_BASE + 0x24) |