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authorStepan Moskovchenko <stepanm@codeaurora.org>2010-11-12 19:29:54 -0800
committerDaniel Walker <dwalker@codeaurora.org>2010-11-30 14:04:21 -0800
commitf6f41eb9ccc0e6fad0ccba4c5e0a97de935db734 (patch)
tree52d92f95253e017533c273d5514803aaefed9c78 /arch/arm/mach-msm
parent516cbc793eb4be5123289d067b54dfcdabeddb25 (diff)
msm: iommu: Don't flush page tables if no devices attached
Don't flush the page tables on an IOMMU domain if there are no IOMMU devices attached to the domain. The act of attaching to the domain will cause an implicit flush of those areas if the page tables are configured to not be L2 cacheable. Signed-off-by: Stepan Moskovchenko <stepanm@codeaurora.org> Signed-off-by: Daniel Walker <dwalker@codeaurora.org>
Diffstat (limited to 'arch/arm/mach-msm')
-rw-r--r--arch/arm/mach-msm/iommu.c15
1 files changed, 9 insertions, 6 deletions
diff --git a/arch/arm/mach-msm/iommu.c b/arch/arm/mach-msm/iommu.c
index 134add78918..74f2157eba4 100644
--- a/arch/arm/mach-msm/iommu.c
+++ b/arch/arm/mach-msm/iommu.c
@@ -50,13 +50,16 @@ static void __flush_iotlb(struct iommu_domain *domain)
unsigned long *fl_table = priv->pgtable;
int i;
- dmac_flush_range(fl_table, fl_table + SZ_16K);
+ if (!list_empty(&priv->list_attached)) {
+ dmac_flush_range(fl_table, fl_table + SZ_16K);
- for (i = 0; i < NUM_FL_PTE; i++)
- if ((fl_table[i] & 0x03) == FL_TYPE_TABLE) {
- void *sl_table = __va(fl_table[i] & FL_BASE_MASK);
- dmac_flush_range(sl_table, sl_table + SZ_4K);
- }
+ for (i = 0; i < NUM_FL_PTE; i++)
+ if ((fl_table[i] & 0x03) == FL_TYPE_TABLE) {
+ void *sl_table = __va(fl_table[i] &
+ FL_BASE_MASK);
+ dmac_flush_range(sl_table, sl_table + SZ_4K);
+ }
+ }
#endif
list_for_each_entry(ctx_drvdata, &priv->list_attached, attached_elm) {