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authorLinus Torvalds <torvalds@linux-foundation.org>2011-07-25 11:53:35 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2011-07-25 11:53:35 -0700
commitdd58ecba48edf14be1a5f70120fcd3002277a74a (patch)
tree6185fbeefa169f7574288553bfb86060437fd57e /arch/arm/mach-msm
parent3f4a12210774eb31c3435a5bc21d57aa20647aeb (diff)
parent604f4498d08f2caa00acc6707eec8f5759996257 (diff)
Merge branch 'next/fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc
* 'next/fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: (35 commits) ARM: msm: platsmp: determine number of CPU cores at boot time ARM: Tegra: Seaboard: Fix I2C bus numbering for ADT7461 ARM: Tegra: Trimslice: Tri-state DAP3 pinmux ARM: orion5x: fixup 5181 MPP mask check ARM: mxs-dma: include <linux/dmaengine.h> ARM: i.MX53: consistently use MX53_UART_PAD_CTRL for uart txd/rxd/rts/cts ARM: i.MX53: UARTn_CTS pin should not change RTS input select ARM: i.MX53: UARTn_TXD pin should not change RXD input select ARM: mx25: Fix typo on CAN1_RX pad setting iomux-mx53: add missing 'IOMUX_CONFIG_SION' for some I2C pad definitions ARM: NUC93X: add UL suffix to VMALLOC_END to ensure it is properly typed ARM: LPC32XXX: add UL suffix to VMALLOC_END to ensure it is properly typed ARM: CNS3XXX: add UL suffix to VMALLOC_END to ensure it is properly typed ARM: i.MX53: Fix IOMUX type o's ARM i.MX dma: Fix burstsize settings mach-mx5: fix the I2C clock parents ARM: mxs/tx28: according to the TX28's datasheet D4-D7 are not used for MMC0 ARM i.MX23/28: platform-mxsfb: Add missing include of linux/dma-mapping.h ARM: mx53: Fix some interrupts marked as reserved. MXC: iomux-v3: correct NO_PAD_CTRL definition ... Fix up trivial conflict in arch/arm/mach-imx/mach-mx31_3ds.c
Diffstat (limited to 'arch/arm/mach-msm')
-rw-r--r--arch/arm/mach-msm/platsmp.c11
1 files changed, 9 insertions, 2 deletions
diff --git a/arch/arm/mach-msm/platsmp.c b/arch/arm/mach-msm/platsmp.c
index 315b9f36532..1a1af9e5625 100644
--- a/arch/arm/mach-msm/platsmp.c
+++ b/arch/arm/mach-msm/platsmp.c
@@ -18,6 +18,7 @@
#include <asm/hardware/gic.h>
#include <asm/cacheflush.h>
+#include <asm/cputype.h>
#include <asm/mach-types.h>
#include <mach/msm_iomap.h>
@@ -40,6 +41,12 @@ volatile int pen_release = -1;
static DEFINE_SPINLOCK(boot_lock);
+static inline int get_core_count(void)
+{
+ /* 1 + the PART[1:0] field of MIDR */
+ return ((read_cpuid_id() >> 4) & 3) + 1;
+}
+
void __cpuinit platform_secondary_init(unsigned int cpu)
{
/* Configure edge-triggered PPIs */
@@ -147,9 +154,9 @@ int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
*/
void __init smp_init_cpus(void)
{
- unsigned int i;
+ unsigned int i, ncores = get_core_count();
- for (i = 0; i < NR_CPUS; i++)
+ for (i = 0; i < ncores; i++)
set_cpu_possible(i, true);
set_smp_cross_call(gic_raise_softirq);