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authorRussell King <rmk+kernel@arm.linux.org.uk>2011-03-06 08:42:55 +0000
committerRussell King <rmk+kernel@arm.linux.org.uk>2011-03-06 08:42:55 +0000
commit71d8c5b11e3b5936ae6c2e0b1dd6f5c78b305b65 (patch)
treec815434adc34cb7274ef6a0ee16cf8491fa0c03e /arch/arm/mach-mv78xx0/irq.c
parent0fff6b9a4e0aba233a2ff644316d29b0cb784e33 (diff)
parent53936c56dcaf1db818fe953ae05592a8b5e345b5 (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/nico/orion into devel-stable
Diffstat (limited to 'arch/arm/mach-mv78xx0/irq.c')
-rw-r--r--arch/arm/mach-mv78xx0/irq.c22
1 files changed, 6 insertions, 16 deletions
diff --git a/arch/arm/mach-mv78xx0/irq.c b/arch/arm/mach-mv78xx0/irq.c
index 22b4ff893b3..08da497c39c 100644
--- a/arch/arm/mach-mv78xx0/irq.c
+++ b/arch/arm/mach-mv78xx0/irq.c
@@ -26,28 +26,18 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
void __init mv78xx0_init_irq(void)
{
- int i;
-
- /* Initialize gpiolib. */
- orion_gpio_init();
-
orion_irq_init(0, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF));
orion_irq_init(32, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF));
orion_irq_init(64, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_ERR_OFF));
/*
- * Mask and clear GPIO IRQ interrupts.
+ * Initialize gpiolib for GPIOs 0-31. (The GPIO interrupt mask
+ * registers for core #1 are at an offset of 0x18 from those of
+ * core #0.)
*/
- writel(0, GPIO_LEVEL_MASK(0));
- writel(0, GPIO_EDGE_MASK(0));
- writel(0, GPIO_EDGE_CAUSE(0));
-
- for (i = IRQ_MV78XX0_GPIO_START; i < NR_IRQS; i++) {
- set_irq_chip(i, &orion_gpio_irq_chip);
- set_irq_handler(i, handle_level_irq);
- irq_desc[i].status |= IRQ_LEVEL;
- set_irq_flags(i, IRQF_VALID);
- }
+ orion_gpio_init(0, 32, GPIO_VIRT_BASE,
+ mv78xx0_core_index() ? 0x18 : 0,
+ IRQ_MV78XX0_GPIO_START);
set_irq_chained_handler(IRQ_MV78XX0_GPIO_0_7, gpio_irq_handler);
set_irq_chained_handler(IRQ_MV78XX0_GPIO_8_15, gpio_irq_handler);
set_irq_chained_handler(IRQ_MV78XX0_GPIO_16_23, gpio_irq_handler);