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authorLennert Buytenhek <buytenh@wantstofly.org>2009-02-20 02:31:58 +0100
committerNicolas Pitre <nico@cam.org>2009-02-19 22:41:37 -0500
commit712424fd95134bf88d27f3885389fe6ab13f34ac (patch)
tree8b146e05b2f2810bddd1c55f30764a690a534a7f /arch/arm/mach-mv78xx0
parentcfdeb6376e439c58c2d37de492d2a8c763621022 (diff)
[ARM] mv78xx0: force eth2/eth3 to PHYless mode on pre-A0 silicon
On pre-A0 revisions of the mv78xx0 SoC, the third and fourth ethernet interface are not brought out to pins, but are internally cross-connected, so if we run on pre-A0 silicon, we'll force eth2 and eth3 to PHYless mode. Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Diffstat (limited to 'arch/arm/mach-mv78xx0')
-rw-r--r--arch/arm/mach-mv78xx0/common.c27
1 files changed, 27 insertions, 0 deletions
diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c
index 538f8f4d4f2..15f9913f4a9 100644
--- a/arch/arm/mach-mv78xx0/common.c
+++ b/arch/arm/mach-mv78xx0/common.c
@@ -15,6 +15,7 @@
#include <linux/mbus.h>
#include <linux/mv643xx_eth.h>
#include <linux/ata_platform.h>
+#include <linux/ethtool.h>
#include <asm/mach/map.h>
#include <asm/mach/time.h>
#include <mach/mv78xx0.h>
@@ -430,9 +431,22 @@ static struct platform_device mv78xx0_ge10 = {
void __init mv78xx0_ge10_init(struct mv643xx_eth_platform_data *eth_data)
{
+ u32 dev, rev;
+
eth_data->shared = &mv78xx0_ge10_shared;
mv78xx0_ge10.dev.platform_data = eth_data;
+ /*
+ * On the Z0, ge10 and ge11 are internally connected back
+ * to back, and not brought out.
+ */
+ mv78xx0_pcie_id(&dev, &rev);
+ if (dev == MV78X00_Z0_DEV_ID) {
+ eth_data->phy_addr = MV643XX_ETH_PHY_NONE;
+ eth_data->speed = SPEED_1000;
+ eth_data->duplex = DUPLEX_FULL;
+ }
+
platform_device_register(&mv78xx0_ge10_shared);
platform_device_register(&mv78xx0_ge10);
}
@@ -484,9 +498,22 @@ static struct platform_device mv78xx0_ge11 = {
void __init mv78xx0_ge11_init(struct mv643xx_eth_platform_data *eth_data)
{
+ u32 dev, rev;
+
eth_data->shared = &mv78xx0_ge11_shared;
mv78xx0_ge11.dev.platform_data = eth_data;
+ /*
+ * On the Z0, ge10 and ge11 are internally connected back
+ * to back, and not brought out.
+ */
+ mv78xx0_pcie_id(&dev, &rev);
+ if (dev == MV78X00_Z0_DEV_ID) {
+ eth_data->phy_addr = MV643XX_ETH_PHY_NONE;
+ eth_data->speed = SPEED_1000;
+ eth_data->duplex = DUPLEX_FULL;
+ }
+
platform_device_register(&mv78xx0_ge11_shared);
platform_device_register(&mv78xx0_ge11);
}