diff options
| author | Eric Bénard <eric@eukrea.com> | 2010-06-08 11:03:00 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2010-07-26 14:18:13 +0200 |
| commit | 8402ed30e16c65ad8560ba3293c7cf9c259712eb (patch) | |
| tree | 1a3a2ccde8c6c6f93e4f8fe75fa21d8dccb886cf /arch/arm/mach-mx25/clock.c | |
| parent | 2518507f727e6bf663fd0f276369cbdeb6a0ccc0 (diff) | |
i.MX25: add AUDMUX and SSI support
* add clocks for audmux and ssi 1 & 2
* add irq for ssi 1 & 2
* add devices platform for ssi1 & 2
* update audmux-v2 for i.MX25
* add base addresses for audmux & ssi 1 & 2
* add iomux configuration for GPIO for AUD5 port
Signed-off-by: Eric Bénard <eric@eukrea.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-mx25/clock.c')
| -rw-r--r-- | arch/arm/mach-mx25/clock.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/arch/arm/mach-mx25/clock.c b/arch/arm/mach-mx25/clock.c index 84f0f1efea4..caeea755158 100644 --- a/arch/arm/mach-mx25/clock.c +++ b/arch/arm/mach-mx25/clock.c @@ -109,6 +109,16 @@ static unsigned long get_rate_uart(struct clk *clk) return get_rate_per(15); } +static unsigned long get_rate_ssi2(struct clk *clk) +{ + return get_rate_per(14); +} + +static unsigned long get_rate_ssi1(struct clk *clk) +{ + return get_rate_per(13); +} + static unsigned long get_rate_i2c(struct clk *clk) { return get_rate_per(6); @@ -171,6 +181,8 @@ static void clk_cgcr_disable(struct clk *clk) DEFINE_CLOCK(gpt_clk, 0, CCM_CGCR0, 5, get_rate_gpt, NULL, NULL); DEFINE_CLOCK(uart_per_clk, 0, CCM_CGCR0, 15, get_rate_uart, NULL, NULL); +DEFINE_CLOCK(ssi1_per_clk, 0, CCM_CGCR0, 13, get_rate_ipg, NULL, NULL); +DEFINE_CLOCK(ssi2_per_clk, 0, CCM_CGCR0, 14, get_rate_ipg, NULL, NULL); DEFINE_CLOCK(cspi1_clk, 0, CCM_CGCR1, 5, get_rate_ipg, NULL, NULL); DEFINE_CLOCK(cspi2_clk, 0, CCM_CGCR1, 6, get_rate_ipg, NULL, NULL); DEFINE_CLOCK(cspi3_clk, 0, CCM_CGCR1, 7, get_rate_ipg, NULL, NULL); @@ -194,6 +206,9 @@ DEFINE_CLOCK(i2c_clk, 0, CCM_CGCR0, 6, get_rate_i2c, NULL, NULL); DEFINE_CLOCK(fec_clk, 0, CCM_CGCR1, 15, get_rate_ipg, NULL, &fec_ahb_clk); DEFINE_CLOCK(dryice_clk, 0, CCM_CGCR1, 8, get_rate_ipg, NULL, NULL); DEFINE_CLOCK(lcdc_clk, 0, CCM_CGCR1, 29, get_rate_lcdc, NULL, &lcdc_per_clk); +DEFINE_CLOCK(ssi1_clk, 0, CCM_CGCR2, 11, get_rate_ssi1, NULL, &ssi1_per_clk); +DEFINE_CLOCK(ssi2_clk, 1, CCM_CGCR2, 12, get_rate_ssi2, NULL, &ssi2_per_clk); +DEFINE_CLOCK(audmux_clk, 0, CCM_CGCR1, 0, NULL, NULL, NULL); #define _REGISTER_CLOCK(d, n, c) \ { \ @@ -228,6 +243,9 @@ static struct clk_lookup lookups[] = { _REGISTER_CLOCK("fec.0", NULL, fec_clk) _REGISTER_CLOCK("imxdi_rtc.0", NULL, dryice_clk) _REGISTER_CLOCK("imx-fb.0", NULL, lcdc_clk) + _REGISTER_CLOCK("imx-ssi.0", NULL, ssi1_clk) + _REGISTER_CLOCK("imx-ssi.1", NULL, ssi2_clk) + _REGISTER_CLOCK(NULL, "audmux", audmux_clk) }; int __init mx25_clocks_init(void) |