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authorSascha Hauer <s.hauer@pengutronix.de>2011-10-14 09:37:34 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2011-10-14 09:37:34 +0200
commitc5d7a9230e5e277f262b6806b7f4d6b35de5a3fb (patch)
tree706a24566c3ac3966d0f2d8db56a97f7cff0dcd2 /arch/arm/mach-mxs/clock-mx28.c
parentd546029043202ab306630fd2a10221feaed029e3 (diff)
parentea42a0d058428845047206ff895e60520a7ff256 (diff)
Merge branch 'features/denx-mx28' into for-arnd-features
Diffstat (limited to 'arch/arm/mach-mxs/clock-mx28.c')
-rw-r--r--arch/arm/mach-mxs/clock-mx28.c16
1 files changed, 11 insertions, 5 deletions
diff --git a/arch/arm/mach-mxs/clock-mx28.c b/arch/arm/mach-mxs/clock-mx28.c
index 5dcc59d5b9e..31223106ad6 100644
--- a/arch/arm/mach-mxs/clock-mx28.c
+++ b/arch/arm/mach-mxs/clock-mx28.c
@@ -738,11 +738,17 @@ static int clk_misc_init(void)
__raw_writel(BM_CLKCTRL_CPU_INTERRUPT_WAIT,
CLKCTRL_BASE_ADDR + HW_CLKCTRL_CPU_SET);
- /* Extra fec clock setting */
- reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_ENET);
- reg &= ~BM_CLKCTRL_ENET_SLEEP;
- reg |= BM_CLKCTRL_ENET_CLK_OUT_EN;
- __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_ENET);
+ /*
+ * Extra fec clock setting
+ * The DENX M28 uses an external clock source
+ * and the clock output must not be enabled
+ */
+ if (!machine_is_m28evk()) {
+ reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_ENET);
+ reg &= ~BM_CLKCTRL_ENET_SLEEP;
+ reg |= BM_CLKCTRL_ENET_CLK_OUT_EN;
+ __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_ENET);
+ }
/*
* 480 MHz seems too high to be ssp clock source directly,