diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-11-01 20:24:30 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-11-01 20:24:30 -0700 |
| commit | 510597e26e2a072e2d46ea5bc57feaf385e37f70 (patch) | |
| tree | 5ffe90e6569481506b06fb6d6a409655fac4f7f6 /arch/arm/mach-nuc93x/include/mach/regs-clock.h | |
| parent | cd9a0b6bd67ec372b0ef3cb2abe26974f888b956 (diff) | |
| parent | 4702abd3f9728893ad5b0f4389e1902588510459 (diff) | |
Merge branch 'next/deletion' of git://git.linaro.org/people/arnd/arm-soc
* 'next/deletion' of git://git.linaro.org/people/arnd/arm-soc:
ARM: mach-nuc93x: delete
Fix up trivial delete/edit conflicts in
arch/arm/mach-nuc93x/{Makefile.boot,mach-nuc932evb.c,time.c}
Diffstat (limited to 'arch/arm/mach-nuc93x/include/mach/regs-clock.h')
| -rw-r--r-- | arch/arm/mach-nuc93x/include/mach/regs-clock.h | 53 |
1 files changed, 0 insertions, 53 deletions
diff --git a/arch/arm/mach-nuc93x/include/mach/regs-clock.h b/arch/arm/mach-nuc93x/include/mach/regs-clock.h deleted file mode 100644 index 5cb2954fbec..00000000000 --- a/arch/arm/mach-nuc93x/include/mach/regs-clock.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * arch/arm/mach-nuc93x/include/mach/regs-clock.h - * - * Copyright (c) 2008 Nuvoton technology corporation. - * - * Wan ZongShun <mcuos.com@gmail.com> - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation;version 2 of the License. - * - */ - -#ifndef __ASM_ARCH_REGS_CLOCK_H -#define __ASM_ARCH_REGS_CLOCK_H - -/* Clock Control Registers */ -#define CLK_BA NUC93X_VA_CLKPWR -#define REG_CLKEN (CLK_BA + 0x00) -#define REG_CLKSEL (CLK_BA + 0x04) -#define REG_CLKDIV (CLK_BA + 0x08) -#define REG_PLLCON0 (CLK_BA + 0x0C) -#define REG_PLLCON1 (CLK_BA + 0x10) -#define REG_PMCON (CLK_BA + 0x14) -#define REG_IRQWAKECON (CLK_BA + 0x18) -#define REG_IRQWAKEFLAG (CLK_BA + 0x1C) -#define REG_IPSRST (CLK_BA + 0x20) -#define REG_CLKEN1 (CLK_BA + 0x24) -#define REG_CLKDIV1 (CLK_BA + 0x28) - -/* Define PLL freq setting */ -#define PLL_DISABLE 0x12B63 -#define PLL_66MHZ 0x2B63 -#define PLL_100MHZ 0x4F64 -#define PLL_120MHZ 0x4F63 -#define PLL_166MHZ 0x4124 -#define PLL_200MHZ 0x4F24 - -/* Define AHB:CPUFREQ ratio */ -#define AHB_CPUCLK_1_1 0x00 -#define AHB_CPUCLK_1_2 0x01 -#define AHB_CPUCLK_1_4 0x02 -#define AHB_CPUCLK_1_8 0x03 - -/* Define APB:AHB ratio */ -#define APB_AHB_1_2 0x01 -#define APB_AHB_1_4 0x02 -#define APB_AHB_1_8 0x03 - -/* Define clock skew */ -#define DEFAULTSKEW 0x48 - -#endif /* __ASM_ARCH_REGS_CLOCK_H */ |