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authorNicolas Pitre <nicolas.pitre@linaro.org>2011-08-03 15:50:38 +0100
committerArnd Bergmann <arnd@arndb.de>2011-09-22 14:02:48 +0000
commit4702abd3f9728893ad5b0f4389e1902588510459 (patch)
tree32926e7c55ef585d9b9c174a0e5f9ed13ed6bf7e /arch/arm/mach-nuc93x/include/mach/regs-clock.h
parentddf28352b80c86754a6424e3a61e8bdf9213b3c7 (diff)
ARM: mach-nuc93x: delete
This architecture received only generic maintenance since December 2009 when it was originally submitted, and no actual additional support since then. It has no defconfig entry either, meaning that it was never built by the ARM KAutobuild. Incidentally it currently doesn't build either when CONFIG_MACH_NUC932EVB is selected which is the only possible config choice. This is therefore dead code and should be removed. If someone wants to revive this code, it could be retrieved from the Git repository, and ideally be merged in mach-w90x900/ instead. Signed-off-by: Nicolas Pitre <nicolas.pitre@linaro.org> Cc: Wan ZongShun <mcuos.com@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mach-nuc93x/include/mach/regs-clock.h')
-rw-r--r--arch/arm/mach-nuc93x/include/mach/regs-clock.h53
1 files changed, 0 insertions, 53 deletions
diff --git a/arch/arm/mach-nuc93x/include/mach/regs-clock.h b/arch/arm/mach-nuc93x/include/mach/regs-clock.h
deleted file mode 100644
index 5cb2954fbec..00000000000
--- a/arch/arm/mach-nuc93x/include/mach/regs-clock.h
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * arch/arm/mach-nuc93x/include/mach/regs-clock.h
- *
- * Copyright (c) 2008 Nuvoton technology corporation.
- *
- * Wan ZongShun <mcuos.com@gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation;version 2 of the License.
- *
- */
-
-#ifndef __ASM_ARCH_REGS_CLOCK_H
-#define __ASM_ARCH_REGS_CLOCK_H
-
-/* Clock Control Registers */
-#define CLK_BA NUC93X_VA_CLKPWR
-#define REG_CLKEN (CLK_BA + 0x00)
-#define REG_CLKSEL (CLK_BA + 0x04)
-#define REG_CLKDIV (CLK_BA + 0x08)
-#define REG_PLLCON0 (CLK_BA + 0x0C)
-#define REG_PLLCON1 (CLK_BA + 0x10)
-#define REG_PMCON (CLK_BA + 0x14)
-#define REG_IRQWAKECON (CLK_BA + 0x18)
-#define REG_IRQWAKEFLAG (CLK_BA + 0x1C)
-#define REG_IPSRST (CLK_BA + 0x20)
-#define REG_CLKEN1 (CLK_BA + 0x24)
-#define REG_CLKDIV1 (CLK_BA + 0x28)
-
-/* Define PLL freq setting */
-#define PLL_DISABLE 0x12B63
-#define PLL_66MHZ 0x2B63
-#define PLL_100MHZ 0x4F64
-#define PLL_120MHZ 0x4F63
-#define PLL_166MHZ 0x4124
-#define PLL_200MHZ 0x4F24
-
-/* Define AHB:CPUFREQ ratio */
-#define AHB_CPUCLK_1_1 0x00
-#define AHB_CPUCLK_1_2 0x01
-#define AHB_CPUCLK_1_4 0x02
-#define AHB_CPUCLK_1_8 0x03
-
-/* Define APB:AHB ratio */
-#define APB_AHB_1_2 0x01
-#define APB_AHB_1_4 0x02
-#define APB_AHB_1_8 0x03
-
-/* Define clock skew */
-#define DEFAULTSKEW 0x48
-
-#endif /* __ASM_ARCH_REGS_CLOCK_H */