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| author | Tomasz Figa <t.figa@samsung.com> | 2012-11-22 00:29:47 +0900 |
|---|---|---|
| committer | Kukjin Kim <kgene.kim@samsung.com> | 2012-11-22 00:39:01 +0900 |
| commit | d80162eccd56c40228e1232de8a203e8553b20a4 (patch) | |
| tree | 0bb36777441be0608e831a5cc5a78cfbe21bd61e /arch/arm/mach-omap2/clkt_dpll.c | |
| parent | 91d88f038ec61bc2d66f72c615629827350c5df1 (diff) | |
ARM: dts: Use drive strength 3 for SD pins for exynos4
This patch modifies pin control groups of SD pins on EXYNOS4210
and EXYNOS4X12 to use drive strength 3 as a default value which
corresponds to S5P_GPIO_DRVSTR_LV4 in legacy non-DT code.
This is needed at least on Origen board for sdhci2 to work and
if any other drive strength is required on each board, we can
overide it.
Signed-off-by: Tomasz Figa <t.figa@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
[kgene.kim@samsung.com: edited commit message]
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/mach-omap2/clkt_dpll.c')
0 files changed, 0 insertions, 0 deletions