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authorPaul Walmsley <paul@pwsan.com>2008-07-03 12:24:45 +0300
committerTony Lindgren <tony@atomide.com>2008-07-03 12:24:45 +0300
commit542313cc98e72d026d2df86f515699dfaface460 (patch)
tree94bc87268a67cd1fff2d63cf48761f137384607d /arch/arm/mach-omap2/cm.h
parent097c584cd48844d9ef8402bdc6ab49e7e2135f31 (diff)
ARM: OMAP2: Clock: Add OMAP3 DPLL autoidle functions
This patch adds support for DPLL autoidle control to the OMAP3 clock framework. These functions will be used by the noncore DPLL enable and disable code - this is because, according to the CDP code, the DPLL autoidle status must be saved and restored across DPLL lock/bypass/off transitions. N.B.: the CORE DPLL (DPLL3) has three autoidle mode options, rather than just two. This code currently does not support the third option, low-power bypass autoidle. Signed-off-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/cm.h')
-rw-r--r--arch/arm/mach-omap2/cm.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/cm.h b/arch/arm/mach-omap2/cm.h
index 1dd873fcc2b..87a44c715aa 100644
--- a/arch/arm/mach-omap2/cm.h
+++ b/arch/arm/mach-omap2/cm.h
@@ -81,6 +81,7 @@
#define OMAP3430ES2_CM_FCLKEN3 0x0008
#define OMAP3430_CM_IDLEST_PLL CM_IDLEST2
#define OMAP3430_CM_AUTOIDLE_PLL CM_AUTOIDLE2
+#define OMAP3430ES2_CM_AUTOIDLE2_PLL CM_AUTOIDLE2
#define OMAP3430_CM_CLKSEL1 CM_CLKSEL
#define OMAP3430_CM_CLKSEL1_PLL CM_CLKSEL
#define OMAP3430_CM_CLKSEL2_PLL CM_CLKSEL2