diff options
| author | Santosh Shilimkar <santosh.shilimkar@ti.com> | 2010-09-16 18:44:46 +0530 |
|---|---|---|
| committer | Santosh Shilimkar <santosh.shilimkar@ti.com> | 2010-09-24 11:30:17 +0530 |
| commit | ed6be0bafc7781634a197ddd85b575ffcd7736b6 (patch) | |
| tree | 5061c75b425900b1c891a9a09bd96723c12a53f9 /arch/arm/mach-omap2/id.c | |
| parent | f47d8c694e666843653f06c257d8cfb87e376f5d (diff) | |
omap4: Update id.c and cpu.h for es2.0
This patch updates the id.c and cpu.h files to support
omap4 ES2.0 silicon detection. Few initial omap4 es2 samples
IDCODE is same as es1. So the patch uses ARM cpuid register to
detect the ES version for such samples
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/id.c')
| -rw-r--r-- | arch/arm/mach-omap2/id.c | 38 |
1 files changed, 31 insertions, 7 deletions
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index 9a879f95950..91d7df402b3 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -298,7 +298,6 @@ static void __init omap4_check_revision(void) u32 idcode; u16 hawkeye; u8 rev; - char *rev_name = "ES1.0"; /* * The IC rev detection is done with hawkeye and rev. @@ -309,14 +308,39 @@ static void __init omap4_check_revision(void) hawkeye = (idcode >> 12) & 0xffff; rev = (idcode >> 28) & 0xff; - if ((hawkeye == 0xb852) && (rev == 0x0)) { - omap_revision = OMAP4430_REV_ES1_0; - omap_chip.oc |= CHIP_IS_OMAP4430ES1; - pr_info("OMAP%04x %s\n", omap_rev() >> 16, rev_name); - return; + /* + * Few initial ES2.0 samples IDCODE is same as ES1.0 + * Use ARM register to detect the correct ES version + */ + if (!rev) { + idcode = read_cpuid(CPUID_ID); + rev = (idcode & 0xf) - 1; + } + + switch (hawkeye) { + case 0xb852: + switch (rev) { + case 0: + omap_revision = OMAP4430_REV_ES1_0; + omap_chip.oc |= CHIP_IS_OMAP4430ES1; + break; + case 1: + omap_revision = OMAP4430_REV_ES2_0; + omap_chip.oc |= CHIP_IS_OMAP4430ES2; + break; + default: + omap_revision = OMAP4430_REV_ES2_0; + omap_chip.oc |= CHIP_IS_OMAP4430ES2; + } + break; + default: + /* Unknown default to latest silicon rev as default*/ + omap_revision = OMAP4430_REV_ES2_0; + omap_chip.oc |= CHIP_IS_OMAP4430ES2; } - pr_err("Unknown OMAP4 CPU id\n"); + pr_info("OMAP%04x ES%d.0\n", + omap_rev() >> 16, ((omap_rev() >> 12) & 0xf) + 1); } #define OMAP3_SHOW_FEATURE(feat) \ |