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authorTony Lindgren <tony@atomide.com>2010-02-15 09:27:24 -0800
committerTony Lindgren <tony@atomide.com>2010-02-15 09:27:24 -0800
commit95d2b4e9cbba4c9a2ac63205e846e7ccfebe69b4 (patch)
tree70cba28f0c96a9cec107117d95dd820ba487596b /arch/arm/mach-omap2/include
parent1cf9d079637e1479842dad0b25f445b5ceec0bab (diff)
omap2/3/4: Clean up defines for entry-macro.S
Define the irq base the same way as for omap2 and omap3, and start using get_irqnr_preamble. Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/include')
-rw-r--r--arch/arm/mach-omap2/include/mach/entry-macro.S15
1 files changed, 7 insertions, 8 deletions
diff --git a/arch/arm/mach-omap2/include/mach/entry-macro.S b/arch/arm/mach-omap2/include/mach/entry-macro.S
index 4fd6b1bdcb2..3e63aaabebe 100644
--- a/arch/arm/mach-omap2/include/mach/entry-macro.S
+++ b/arch/arm/mach-omap2/include/mach/entry-macro.S
@@ -19,6 +19,12 @@
#include <plat/omap34xx.h>
#include <plat/omap44xx.h>
+#define OMAP2_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE)
+#define OMAP3_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE)
+#define OMAP4_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)
+#define INTCPS_SIR_IRQ_OFFSET 0x0040 /* omap2/3 active interrupt offset */
+#define ACTIVEIRQ_MASK 0x7f /* omap2/3 active interrupt bits */
+
.macro disable_fiq
.endm
@@ -27,11 +33,6 @@
#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
-#define OMAP2_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE)
-#define OMAP3_IRQ_BASE OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE)
-#define INTCPS_SIR_IRQ_OFFSET 0x0040 /* Active interrupt offset */
-#define ACTIVEIRQ_MASK 0x7f /* Active interrupt bits */
-
.pushsection .data
omap_irq_base: .word 0
.popsection
@@ -90,8 +91,6 @@ omap_irq_base: .word 0
#ifdef CONFIG_ARCH_OMAP4
-#define OMAP44XX_VA_GIC_CPU_BASE OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE)
-
.macro get_irqnr_preamble, base, tmp
.endm
@@ -115,7 +114,7 @@ omap_irq_base: .word 0
* valid range for an IRQ (30-1020 inclusive).
*/
.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
- ldr \base, =OMAP44XX_VA_GIC_CPU_BASE
+ ldr \base, =OMAP4_IRQ_BASE
ldr \irqstat, [\base, #GIC_CPU_INTACK]
ldr \tmp, =1021