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authorTony Lindgren <tony@atomide.com>2010-12-09 15:49:23 -0800
committerTony Lindgren <tony@atomide.com>2010-12-10 09:42:51 -0800
commit5d190c40100793a6dfc37bf325677c10f3c80edf (patch)
treedeb1dd54ec3b056fb10ed2ae24729cba7505bb85 /arch/arm/mach-omap2/include
parent03a9e5126147c9f92aeba4b34f62b15b625087fb (diff)
omap2+: Initialize omap_irq_base for entry-macro.S from platform code
This way we can use the generic omap SoC detection code instead. Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/include')
-rw-r--r--arch/arm/mach-omap2/include/mach/entry-macro.S44
1 files changed, 15 insertions, 29 deletions
diff --git a/arch/arm/mach-omap2/include/mach/entry-macro.S b/arch/arm/mach-omap2/include/mach/entry-macro.S
index 06e64e1fc28..60329411a63 100644
--- a/arch/arm/mach-omap2/include/mach/entry-macro.S
+++ b/arch/arm/mach-omap2/include/mach/entry-macro.S
@@ -38,41 +38,27 @@
*/
#ifdef MULTI_OMAP2
+
+/*
+ * We use __glue to avoid errors with multiple definitions of
+ * .globl omap_irq_base as it's included from entry-armv.S but not
+ * from entry-common.S.
+ */
+#ifdef __glue
.pushsection .data
-omap_irq_base: .word 0
+ .globl omap_irq_base
+omap_irq_base:
+ .word 0
.popsection
+#endif
- /* Configure the interrupt base on the first interrupt */
+ /*
+ * Configure the interrupt base on the first interrupt.
+ * See also omap_irq_base_init for setting omap_irq_base.
+ */
.macro get_irqnr_preamble, base, tmp
-9:
ldr \base, =omap_irq_base @ irq base address
ldr \base, [\base, #0] @ irq base value
- cmp \base, #0 @ already configured?
- bne 9997f @ nothing to do
-
- mrc p15, 0, \tmp, c0, c0, 0 @ get processor revision
- and \tmp, \tmp, #0x000f0000 @ only check architecture
- cmp \tmp, #0x00070000 @ is v6?
- beq 2400f @ found v6 so it's omap24xx
- mrc p15, 0, \tmp, c0, c0, 0 @ get processor revision
- and \tmp, \tmp, #0x000000f0 @ check cortex 8 or 9
- cmp \tmp, #0x00000080 @ cortex A-8?
- beq 3400f @ found A-8 so it's omap34xx
- cmp \tmp, #0x00000090 @ cortex A-9?
- beq 4400f @ found A-9 so it's omap44xx
-2400: ldr \base, =OMAP2_IRQ_BASE
- ldr \tmp, =omap_irq_base
- str \base, [\tmp, #0]
- b 9b
-3400: ldr \base, =OMAP3_IRQ_BASE
- ldr \tmp, =omap_irq_base
- str \base, [\tmp, #0]
- b 9b
-4400: ldr \base, =OMAP4_IRQ_BASE
- ldr \tmp, =omap_irq_base
- str \base, [\tmp, #0]
- b 9b
-9997:
.endm
/* Check the pending interrupts. Note that base already set */