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authorsricharan <r.sricharan@ti.com>2011-09-07 17:25:16 +0530
committerSantosh Shilimkar <santosh.shilimkar@ti.com>2011-09-24 13:28:57 +0530
commit551a9fa9b1f01aa16f9007337b3cc12216c732fa (patch)
tree63e09c9d2ee478b4bb1b71f7cb4448c30cc18de9 /arch/arm/mach-omap2/omap_l3_noc.h
parent6616aac66d798f3f185d90d9057e47abd7d3c9b3 (diff)
OMAP: Print Initiator name for l3 custom error.
The initiator id gets logged in the l3 target registers for custom error. So print it to aid debugging. Based on a internal patch by Devaraj Rangasamy <dev@ti.com> Signed-off-by: sricharan <r.sricharan@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/omap_l3_noc.h')
-rw-r--r--arch/arm/mach-omap2/omap_l3_noc.h34
1 files changed, 34 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/omap_l3_noc.h b/arch/arm/mach-omap2/omap_l3_noc.h
index 74c16434f2b..90b50984cd2 100644
--- a/arch/arm/mach-omap2/omap_l3_noc.h
+++ b/arch/arm/mach-omap2/omap_l3_noc.h
@@ -34,8 +34,11 @@
/* L3 TARG register offsets */
#define L3_TARG_STDERRLOG_MAIN 0x48
#define L3_TARG_STDERRLOG_SLVOFSLSB 0x5c
+#define L3_TARG_STDERRLOG_MSTADDR 0x68
#define L3_FLAGMUX_REGERR0 0xc
+#define NUM_OF_L3_MASTERS (sizeof(l3_masters)/sizeof(l3_masters[0]))
+
static u32 l3_flagmux[L3_MODULES] = {
0x500,
0x1000,
@@ -76,6 +79,37 @@ static u32 l3_targ_inst_clk3[] = {
0x0100 /* EMUSS */
};
+static struct l3_masters_data {
+ u32 id;
+ char name[10];
+} l3_masters[] = {
+ { 0x0 , "MPU"},
+ { 0x10, "CS_ADP"},
+ { 0x14, "xxx"},
+ { 0x20, "DSP"},
+ { 0x30, "IVAHD"},
+ { 0x40, "ISS"},
+ { 0x44, "DucatiM3"},
+ { 0x48, "FaceDetect"},
+ { 0x50, "SDMA_Rd"},
+ { 0x54, "SDMA_Wr"},
+ { 0x58, "xxx"},
+ { 0x5C, "xxx"},
+ { 0x60, "SGX"},
+ { 0x70, "DSS"},
+ { 0x80, "C2C"},
+ { 0x88, "xxx"},
+ { 0x8C, "xxx"},
+ { 0x90, "HSI"},
+ { 0xA0, "MMC1"},
+ { 0xA4, "MMC2"},
+ { 0xA8, "MMC6"},
+ { 0xB0, "UNIPRO1"},
+ { 0xC0, "USBHOSTHS"},
+ { 0xC4, "USBOTGHS"},
+ { 0xC8, "USBHOSTFS"}
+};
+
static char *l3_targ_inst_name[L3_MODULES][18] = {
{
"DMM1",