diff options
| author | Paul Walmsley <paul@pwsan.com> | 2009-05-12 17:27:09 -0600 |
|---|---|---|
| committer | paul <paul@twilight.(none)> | 2009-05-12 17:27:09 -0600 |
| commit | 98cfe5abf24c6d2f06b70fa8a8a111681bed3ed9 (patch) | |
| tree | 004915e0704e02cf595e47be6d1bf2283998ae71 /arch/arm/mach-omap2/sdrc.c | |
| parent | fa0406a8d8c3a4a302085ccd031d999161405f70 (diff) | |
OMAP3 SDRC: initialize SDRC_POWER at boot
Initialize SDRC_POWER to a known-good setting when the kernel boots.
Necessary since some bootloaders don't initialize SDRC_POWER properly.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Diffstat (limited to 'arch/arm/mach-omap2/sdrc.c')
| -rw-r--r-- | arch/arm/mach-omap2/sdrc.c | 19 |
1 files changed, 18 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/sdrc.c b/arch/arm/mach-omap2/sdrc.c index 2a30060cb4b..d62e4e10d4b 100644 --- a/arch/arm/mach-omap2/sdrc.c +++ b/arch/arm/mach-omap2/sdrc.c @@ -37,6 +37,10 @@ static struct omap_sdrc_params *sdrc_init_params; void __iomem *omap2_sdrc_base; void __iomem *omap2_sms_base; +/* SDRC_POWER register bits */ +#define SDRC_POWER_EXTCLKDIS_SHIFT 3 +#define SDRC_POWER_PWDENA_SHIFT 2 +#define SDRC_POWER_PAGEPOLICY_SHIFT 0 /** * omap2_sdrc_get_params - return SDRC register values for a given clock rate @@ -74,7 +78,14 @@ void __init omap2_set_globals_sdrc(struct omap_globals *omap2_globals) omap2_sms_base = omap2_globals->sms; } -/* turn on smart idle modes for SDRAM scheduler and controller */ +/** + * omap2_sdrc_init - initialize SMS, SDRC devices on boot + * @sp: pointer to a null-terminated list of struct omap_sdrc_params + * + * Turn on smart idle modes for SDRAM scheduler and controller. + * Program a known-good configuration for the SDRC to deal with buggy + * bootloaders. + */ void __init omap2_sdrc_init(struct omap_sdrc_params *sp) { u32 l; @@ -90,4 +101,10 @@ void __init omap2_sdrc_init(struct omap_sdrc_params *sp) sdrc_write_reg(l, SDRC_SYSCONFIG); sdrc_init_params = sp; + + /* XXX Enable SRFRONIDLEREQ here also? */ + l = (1 << SDRC_POWER_EXTCLKDIS_SHIFT) | + (1 << SDRC_POWER_PWDENA_SHIFT) | + (1 << SDRC_POWER_PAGEPOLICY_SHIFT); + sdrc_write_reg(l, SDRC_POWER); } |