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authorRussell King <rmk@dyn-67.arm.linux.org.uk>2009-02-19 13:29:22 +0000
committerRussell King <rmk+kernel@arm.linux.org.uk>2009-02-19 17:28:30 +0000
commitc0bf31320dea2cbcbab1f53ee15a8520f762409b (patch)
tree1b4fbb4396da448eb116f2bee8b58030b63cfe3b /arch/arm/mach-omap2/sdrc2xxx.c
parent8b9dbc16d4f5786c6c930ab028722e3ed7e4285b (diff)
[ARM] omap: add support for bypassing DPLLs
This roughly corresponds with OMAP commits: 7d06c48, 3241b19, 88b5d9b, 18a5500, 9c909ac, 5c6497b, 8b1f0bd, 2ac1da8. For both OMAP2 and OMAP3, we note the reference and bypass clocks in the DPLL data structure. Whenever we modify the DPLL rate, we first ensure that both the reference and bypass clocks are enabled. Then, we decide whether to use the reference and DPLL, or the bypass clock if the desired rate is identical to the bypass rate, and program the DPLL appropriately. Finally, we update the clock's parent, and then disable the unused clocks. This keeps the parents correctly balanced, and more importantly ensures that the bypass clock is running whenever we reprogram the DPLL. This is especially important because the procedure for reprogramming the DPLL involves switching to the bypass clock. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-omap2/sdrc2xxx.c')
-rw-r--r--arch/arm/mach-omap2/sdrc2xxx.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/sdrc2xxx.c b/arch/arm/mach-omap2/sdrc2xxx.c
index 3a47aba2903..0afdad5ae9f 100644
--- a/arch/arm/mach-omap2/sdrc2xxx.c
+++ b/arch/arm/mach-omap2/sdrc2xxx.c
@@ -29,7 +29,7 @@
#include <mach/sram.h>
#include "prm.h"
-
+#include "clock.h"
#include <mach/sdrc.h>
#include "sdrc.h"