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authorNishanth Menon <nm@ti.com>2012-02-29 23:33:39 +0100
committerKevin Hilman <khilman@ti.com>2012-03-05 11:29:26 -0800
commitad54c3ddb472410f05083dbcf03fcec67ab7b2a5 (patch)
tree180377a57c72705ec7f461e83904a0ad22318e25 /arch/arm/mach-omap2/smartreflex-class3.c
parent74754cc5e047184588f35b3f9689a9c3e0599483 (diff)
ARM: OMAP3+: SmartReflex Class3: disable errorgen before disable VP
SmartReflex AVS Errorgen module supplies signals to Voltage Processor. It is suggested that by disabling Errorgen module before we disable VP, we might be able to ensure lesser chances of race condition to occur in the system. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Jean Pihet <j-pihet@ti.com> Reviewed-by: Kevin Hilman <khilman@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
Diffstat (limited to 'arch/arm/mach-omap2/smartreflex-class3.c')
-rw-r--r--arch/arm/mach-omap2/smartreflex-class3.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/smartreflex-class3.c b/arch/arm/mach-omap2/smartreflex-class3.c
index 53d9d0a5b39..955566eefac 100644
--- a/arch/arm/mach-omap2/smartreflex-class3.c
+++ b/arch/arm/mach-omap2/smartreflex-class3.c
@@ -29,6 +29,7 @@ static int sr_class3_enable(struct voltagedomain *voltdm)
static int sr_class3_disable(struct voltagedomain *voltdm, int is_volt_reset)
{
+ sr_disable_errgen(voltdm);
omap_vp_disable(voltdm);
sr_disable(voltdm);
if (is_volt_reset)